[PATCH] D17270: Support arbitrary addrspace pointers in masked load/store intrinsics

[Elena Demikhovsky via llvm-commits]

delena added a comment.

While vectorizing, the address space we can keep inside pointer. It should not be a part of the name.
The question only how to specify address space in LLVM IR that use masked intrinsics.
The name like "llvm.masked.store.v2i64.p0v2i64" duplicates information (v2i64) and makes the code unreadable.
The intrinsic with default address space should remain with the short name:
"llvm.masked.store.v2i64"
The intrinsic with specified address space may have one more parameter.
The intrinsic with specified address space may have metadata.
Or look like this: llvm.masked.store.v2i64.a1
There is no way to specify address space in all other intrinsics that use pointers.


http://reviews.llvm.org/D17270