[PATCH] D17305: AMDGPU/SI: Use v_readfirstlane to legalize SMRD with VGPR base pointer

[Tom Stellard via llvm-commits]

tstellarAMD created this revision.
tstellarAMD added reviewers: cfang, arsenm, nhaehnle.
tstellarAMD added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.

Instead of trying to replace SMRD instructions with a VGPR base pointer
with an equivalent MUBUF instruction, we now copy the base pointer to
SGPRs using v_readfirstlane.

This is safe to do, because any load selected as an SMRD instruction
has been proven to have a uniform base pointer, so each thread in the
wave will have the same pointer value in VGPRs.

This will fix some errors on VI from trying to replace SMRD instructions
with addr64-enabled MUBUF instructions that don't exist.

http://reviews.llvm.org/D17305

Files:
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.h
  test/CodeGen/AMDGPU/missing-store.ll
  test/CodeGen/AMDGPU/salu-to-valu.ll
  test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll

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