Tutorial: How To Write An LLVM Register Allocator

Madhur Amilkanthwar via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 9 21:26:28 PST 2016


+1 for such efforts!
 It is of utter importance to have such things documented to avoid
reinventing the wheel every time someone wants to work with LLVM.
I don't know if LLVM community archives such docs, but if not these should
be kept somewhere safe.

On Wed, Feb 10, 2016 at 10:28 AM, Hal Finkel via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> ----- Original Message -----
>
> > From: "Sean Silva via llvm-commits" <llvm-commits at lists.llvm.org>
> > To: "Matthias Braun" <matze at braunis.de>
> > Cc: "Natanael Ramos" <naelr8 at gmail.com>, "llvm-commits"
> > <llvm-commits at lists.llvm.org>
> > Sent: Tuesday, February 9, 2016 10:40:56 PM
> > Subject: Re: Tutorial: How To Write An LLVM Register Allocator
>
> > On Tue, Feb 9, 2016 at 6:56 PM, Matthias Braun < matze at braunis.de >
> > wrote:
>
> > > Interesting,
> >
>
> > > I don't think the document is in a shape for documentation that
> > > ships
> > > with llvm. Just some points:
> >
>
> > > - The document keeps jumping between general register allocation
> > > concepts, general llvm concepts and code snippets of llvms register
> > > allocators. It's hard to follow which is which.
> >
> > I agree.
>
> > > - The basic concepts would need better and more in-depth
> > > descriptions, just to give some topics:
> >
> > > - How does the basic program representation work, MachineInstr,
> > > MachineOperand (esp. the register kind with the undef, dead and
> > > kill
> > > flags), subregisters, subregisterindexes, register classes, how we
> > > express most constraints with register classes, virtual registers
> > > how register are encoded in unsigneds, a proper description of
> > > register units, what't does it mean if a register is reserved or
> > > allocatable, pristine registers, lanemasks, ...
> >
> > Yeah, there needs to be some acknowledgement of the MI
> > representation.
>
> > > - How does the liveness representation work: What is a Segment, a
> > > VNInfo, a SlotIndex, how can we maintain SSA form in the liveness
> > > info (and why do we do that)
> >
> > > - How do all the regalloc related passes in llvm play together:
> > > PhiElimination, TwoAddress, RegisterCoalescer, RegAllocXXX,
> > > VirtRegRewriter
> >
> > Do you think all this needs to be covered in a HowTo? That seems like
> > an awful lot.
>
> I agree. This one document is not going to solve our systemic problem of
> lack of documentation for the backend infrastructure. Nor should we make
> solving that problem a prerequisite for accepting this contribution.
>
>  -Hal
>
> > Which do you think are the essential content for a
> > HowTo? The goal isn't becoming an expert, but just wiring up the
> > boilerplate and getting an end-to-end experience writing something
> > simple (here's an example of another howto for reference:
> > http://llvm.org/docs/HowToSetUpLLVMStyleRTTI.html ).
>
> > We might be able to punt on a lot of the MI stuff for this document
> > (just state it as a prerequisite) and eventually link to a "How to
> > write a MachineFunctionPass" or something which can explain the MI
> > basics.
>
> > -- Sean Silva
>
> > > On the other hand I applaud going through the work and actually
> > > writing something down, this will surely help other people who just
> > > want to get started with the matter. Maybe there is a way to get
> > > this up onto the llvm blog (who maintains that)?
> >
>
> > > - Matthias
> >
>
> > > > On Feb 9, 2016, at 6:18 PM, Sean Silva via llvm-commits <
> > > > llvm-commits at lists.llvm.org > wrote:
> > >
> >
>
> > > > Matthias, it's rare that we get a substantial piece of
> > > > documentation
> > > > like this. Can you take a look at the content?
> > >
> >
>
> > > > On Fri, Feb 5, 2016 at 3:50 PM, Natanael Ramos via llvm-commits <
> > > > llvm-commits at lists.llvm.org > wrote:
> > >
> >
>
> > > > > Hello
> > > >
> > >
> >
>
> > > > > My name is Natanael Ramos, I'm a student of bachelor degree on
> > > > > Computer Science Course, here on Brazil.
> > > >
> > >
> >
>
> > > > > Recently I have worked with LLVM for my undergraduate thesis (I
> > > > > don't
> > > > > really know how is called in other countries, here is called
> > > > > Completion of course work ), in my work I have implemented an
> > > > > register allocator using LLVM and have tested him with the
> > > > > built-in
> > > > > allocators in LLVM (Probably I'll publish a paper soon, if all
> > > > > goes
> > > > > as expected).
> > > >
> > >
> >
>
> > > > > As another product of my work, I have created a tutorial of how
> > > > > to
> > > > > write an LLVM register allocator, extending the RegAllocBase
> > > > > interface, this tutorial is based on my understanding of the
> > > > > LLVM
> > > > > framework for working with the register allocation pass.
> > > >
> > >
> >
>
> > > > > The tutorial have been written in reStructuredText following
> > > > > the
> > > > > LLVM
> > > > > instructions and orientations (
> > > > > http://www.llvm.org/docs/SphinxQuickstartTemplate.html ). As
> > > > > it's
> > > > > suggested, I'm sending the tutorial to this mailing list in
> > > > > order
> > > > > to
> > > > > contribute to the community of developers, which use LLLVM.
> > > >
> > >
> >
>
> > > > > Any suggestions, please let me know.
> > > >
> > >
> >
>
> > > > > --
> > > >
> > >
> >
>
> > > > > Natanael Ramos
> > > >
> > >
> >
> > > > > Membro do corpo discente de Ciência da Computação pelo
> > > > > Instituto
> > > > > Federal de
> > > >
> > >
> >
> > > > > Minas Gerais - Campus Formiga
> > > >
> > >
> >
>
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> >
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> > >
> >
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> > > >
> > >
> >
>
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>
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> --
>
> --
> Hal Finkel
> Assistant Computational Scientist
> Leadership Computing Facility
> Argonne National Laboratory
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-- 
Thank You.
Madhur D. Amilkanthwar
RISE lab,
IIT Madras.
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