[llvm] r260061 - [X86][SSE] Regenerate PSHUFB shuffle mask comments tests

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Sun Feb  7 16:22:09 2016
New Revision: 260061

URL: http://llvm.org/viewvc/llvm-project?rev=260061&view=rev
Log:
[X86][SSE] Regenerate PSHUFB shuffle mask comments tests

Modified:
    llvm/trunk/test/CodeGen/X86/pshufb-mask-comments.ll

Modified: llvm/trunk/test/CodeGen/X86/pshufb-mask-comments.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pshufb-mask-comments.ll?rev=260061&r1=260060&r2=260061&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pshufb-mask-comments.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pshufb-mask-comments.ll Sun Feb  7 16:22:09 2016
@@ -1,10 +1,13 @@
-; RUN: llc < %s -march=x86-64 -mattr=+ssse3 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s
 
 ; Test that the pshufb mask comment is correct.
 
 define <16 x i8> @test1(<16 x i8> %V) {
 ; CHECK-LABEL: test1:
-; CHECK: pshufb {{.*}}# xmm0 = xmm0[1,0,0,0,0,2,0,0,0,0,3,0,0,0,0,4]
+; CHECK:       # BB#0:
+; CHECK-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[1,0,0,0,0,2,0,0,0,0,3,0,0,0,0,4]
+; CHECK-NEXT:    retq
   %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %V, <16 x i8> <i8 1, i8 0, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 0, i8 4>)
   ret <16 x i8> %1
 }
@@ -13,7 +16,9 @@ define <16 x i8> @test1(<16 x i8> %V) {
 
 define <16 x i8> @test2(<16 x i8> %V) {
 ; CHECK-LABEL: test2:
-; CHECK: pshufb {{.*}}# xmm0 = xmm0[15,0,0,0,0,0,0,0,0,0,1,0,0,0,0,2]
+; CHECK:       # BB#0:
+; CHECK-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[15,0,0,0,0,0,0,0,0,0,1,0,0,0,0,2]
+; CHECK-NEXT:    retq
   %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %V, <16 x i8> <i8 15, i8 0, i8 0, i8 0, i8 0, i8 16, i8 0, i8 0, i8 0, i8 0, i8 17, i8 0, i8 0, i8 0, i8 0, i8 50>)
   ret <16 x i8> %1
 }
@@ -22,7 +27,9 @@ define <16 x i8> @test2(<16 x i8> %V) {
 
 define <16 x i8> @test3(<16 x i8> %V) {
 ; CHECK-LABEL: test3:
-; CHECK: pshufb {{.*}}# xmm0 = xmm0[1,0,0,15,0,2,0,0],zero,xmm0[0,3,0,0],zero,xmm0[0,4]
+; CHECK:       # BB#0:
+; CHECK-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[1,0,0,15,0,2,0,0],zero,xmm0[0,3,0,0],zero,xmm0[0,4]
+; CHECK-NEXT:    retq
   %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %V, <16 x i8> <i8 1, i8 0, i8 0, i8 127, i8 0, i8 2, i8 0, i8 0, i8 128, i8 0, i8 3, i8 0, i8 0, i8 255, i8 0, i8 4>)
   ret <16 x i8> %1
 }
@@ -30,16 +37,30 @@ define <16 x i8> @test3(<16 x i8> %V) {
 ; Test that we won't crash when the constant was reused for another instruction.
 
 define <16 x i8> @test4(<2 x i64>* %V) {
-; CHECK-LABEL: test4
-; CHECK: pshufb {{.*}}
-  store <2 x i64> <i64 1084818905618843912, i64 506097522914230528>, <2 x i64>* %V, align 16
-  %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> undef, <16 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)
-  ret <16 x i8> %1
+; CHECK-LABEL: test4:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movdqa {{.*#+}} xmm0 = [1084818905618843912,506097522914230528]
+; CHECK-NEXT:    movdqa %xmm0, (%rdi)
+; CHECK-NEXT:    pshufb %xmm0, %xmm0
+; CHECK-NEXT:    retq
+  %1 = insertelement <2 x i64> undef, i64 1084818905618843912, i32 0
+  %2 = insertelement <2 x i64>    %1, i64  506097522914230528, i32 1
+  store <2 x i64> %2, <2 x i64>* %V, align 16
+  %3 = bitcast <2 x i64> %2 to <16 x i8>
+  %4 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> undef, <16 x i8> %3)
+  ret <16 x i8> %4
 }
 
 define <16 x i8> @test5() {
-; CHECK-LABEL: test5
-; CHECK: pshufb {{.*}}
+; CHECK-LABEL: test5:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movl $1, %eax
+; CHECK-NEXT:    movd %rax, %xmm0
+; CHECK-NEXT:    movaps %xmm0, (%rax)
+; CHECK-NEXT:    movdqa {{.*#+}} xmm0 = [1,1]
+; CHECK-NEXT:    movdqa %xmm0, (%rax)
+; CHECK-NEXT:    pshufb %xmm0, %xmm0
+; CHECK-NEXT:    retq
   store <2 x i64> <i64 1, i64 0>, <2 x i64>* undef, align 16
   %l = load <2 x i64>, <2 x i64>* undef, align 16
   %shuffle = shufflevector <2 x i64> %l, <2 x i64> undef, <2 x i32> zeroinitializer