[llvm] r259997 - [X86][SSE] Moved shuffle decode CASE macros earlier. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Feb 6 09:02:15 PST 2016
Author: rksimon
Date: Sat Feb 6 11:02:15 2016
New Revision: 259997
URL: http://llvm.org/viewvc/llvm-project?rev=259997&view=rev
Log:
[X86][SSE] Moved shuffle decode CASE macros earlier. NFC.
To allow the helper functions to make use of them.
Modified:
llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp
Modified: llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp?rev=259997&r1=259996&r2=259997&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp (original)
+++ llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp Sat Feb 6 11:02:15 2016
@@ -21,6 +21,54 @@
using namespace llvm;
+#define CASE_MASK_INS_COMMON(Inst, Suffix, src) \
+ case X86::V##Inst##Suffix##src: \
+ case X86::V##Inst##Suffix##src##k: \
+ case X86::V##Inst##Suffix##src##kz:
+
+#define CASE_SSE_INS_COMMON(Inst, src) \
+ case X86::Inst##src:
+
+#define CASE_AVX_INS_COMMON(Inst, Suffix, src) \
+ case X86::V##Inst##Suffix##src:
+
+#define CASE_MOVDUP(Inst, src) \
+ CASE_MASK_INS_COMMON(Inst, Z, r##src) \
+ CASE_MASK_INS_COMMON(Inst, Z256, r##src) \
+ CASE_MASK_INS_COMMON(Inst, Z128, r##src) \
+ CASE_AVX_INS_COMMON(Inst, , r##src) \
+ CASE_AVX_INS_COMMON(Inst, Y, r##src) \
+ CASE_SSE_INS_COMMON(Inst, r##src)
+
+#define CASE_UNPCK(Inst, src) \
+ CASE_MASK_INS_COMMON(Inst, Z, r##src) \
+ CASE_MASK_INS_COMMON(Inst, Z256, r##src) \
+ CASE_MASK_INS_COMMON(Inst, Z128, r##src) \
+ CASE_AVX_INS_COMMON(Inst, , r##src) \
+ CASE_AVX_INS_COMMON(Inst, Y, r##src) \
+ CASE_SSE_INS_COMMON(Inst, r##src)
+
+#define CASE_SHUF(Inst, src) \
+ CASE_MASK_INS_COMMON(Inst, Z, r##src##i) \
+ CASE_MASK_INS_COMMON(Inst, Z256, r##src##i) \
+ CASE_MASK_INS_COMMON(Inst, Z128, r##src##i) \
+ CASE_AVX_INS_COMMON(Inst, , r##src##i) \
+ CASE_AVX_INS_COMMON(Inst, Y, r##src##i) \
+ CASE_SSE_INS_COMMON(Inst, r##src##i)
+
+#define CASE_VPERM(Inst, src) \
+ CASE_MASK_INS_COMMON(Inst, Z, src##i) \
+ CASE_MASK_INS_COMMON(Inst, Z256, src##i) \
+ CASE_MASK_INS_COMMON(Inst, Z128, src##i) \
+ CASE_AVX_INS_COMMON(Inst, , src##i) \
+ CASE_AVX_INS_COMMON(Inst, Y, src##i)
+
+#define CASE_VSHUF(Inst, src) \
+ CASE_MASK_INS_COMMON(SHUFF##Inst, Z, r##src##i) \
+ CASE_MASK_INS_COMMON(SHUFI##Inst, Z, r##src##i) \
+ CASE_MASK_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \
+ CASE_MASK_INS_COMMON(SHUFI##Inst, Z256, r##src##i)
+
static unsigned getVectorRegSize(unsigned RegNo) {
if (X86::ZMM0 <= RegNo && RegNo <= X86::ZMM31)
return 512;
@@ -91,54 +139,6 @@ static MVT getZeroExtensionResultType(co
}
}
-#define CASE_MASK_INS_COMMON(Inst, Suffix, src) \
- case X86::V##Inst##Suffix##src: \
- case X86::V##Inst##Suffix##src##k: \
- case X86::V##Inst##Suffix##src##kz:
-
-#define CASE_SSE_INS_COMMON(Inst, src) \
- case X86::Inst##src:
-
-#define CASE_AVX_INS_COMMON(Inst, Suffix, src) \
- case X86::V##Inst##Suffix##src:
-
-#define CASE_MOVDUP(Inst, src) \
- CASE_MASK_INS_COMMON(Inst, Z, r##src) \
- CASE_MASK_INS_COMMON(Inst, Z256, r##src) \
- CASE_MASK_INS_COMMON(Inst, Z128, r##src) \
- CASE_AVX_INS_COMMON(Inst, , r##src) \
- CASE_AVX_INS_COMMON(Inst, Y, r##src) \
- CASE_SSE_INS_COMMON(Inst, r##src) \
-
-#define CASE_UNPCK(Inst, src) \
- CASE_MASK_INS_COMMON(Inst, Z, r##src) \
- CASE_MASK_INS_COMMON(Inst, Z256, r##src) \
- CASE_MASK_INS_COMMON(Inst, Z128, r##src) \
- CASE_AVX_INS_COMMON(Inst, , r##src) \
- CASE_AVX_INS_COMMON(Inst, Y, r##src) \
- CASE_SSE_INS_COMMON(Inst, r##src) \
-
-#define CASE_SHUF(Inst, src) \
- CASE_MASK_INS_COMMON(Inst, Z, r##src##i) \
- CASE_MASK_INS_COMMON(Inst, Z256, r##src##i) \
- CASE_MASK_INS_COMMON(Inst, Z128, r##src##i) \
- CASE_AVX_INS_COMMON(Inst, , r##src##i) \
- CASE_AVX_INS_COMMON(Inst, Y, r##src##i) \
- CASE_SSE_INS_COMMON(Inst, r##src##i) \
-
-#define CASE_VPERM(Inst, src) \
- CASE_MASK_INS_COMMON(Inst, Z, src##i) \
- CASE_MASK_INS_COMMON(Inst, Z256, src##i) \
- CASE_MASK_INS_COMMON(Inst, Z128, src##i) \
- CASE_AVX_INS_COMMON(Inst, , src##i) \
- CASE_AVX_INS_COMMON(Inst, Y, src##i) \
-
-#define CASE_VSHUF(Inst, src) \
- CASE_MASK_INS_COMMON(SHUFF##Inst, Z, r##src##i) \
- CASE_MASK_INS_COMMON(SHUFI##Inst, Z, r##src##i) \
- CASE_MASK_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \
- CASE_MASK_INS_COMMON(SHUFI##Inst, Z256, r##src##i) \
-
/// \brief Extracts the types and if it has memory operand for a given
/// (SHUFF32x4/SHUFF64x2/SHUFI32x4/SHUFI64x2) instruction.
static void getVSHUF64x2FamilyInfo(const MCInst *MI, MVT &VT, bool &HasMemOp) {
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