[PATCH] D16829: An implementation of Swing Modulo Scheduling

Mark Schimmel via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 5 14:24:56 PST 2016


marksl added a subscriber: marksl.
marksl added a comment.

If you have a functional unit that issues in stages such that another instruction of needing the same FU can ussue the very next cycle, then isn't the sum of the cycles too great? Example:

InstrItinData<IIC_MUL_rr, [InstrStage<1, [MUL_DSP_STAGE1]>,InstrStage<1, [MUL_DSP_STAGE2]>,InstrStage<1, [MUL_DSP_STAGE3]>]>,

In this case multiplies will issue back-to-back and require 3 cycles to complete. If we have 2 multiplies then is ResMII = (2 * 3) / 1 = 6 when in reality it will be 4 cycles since it's broken into stages.


================
Comment at: lib/CodeGen/MachinePipeliner.cpp:1382
@@ +1381,3 @@
+
+/// Calculate the resource constrained minimum initiation interval for the
+/// specified loop. We use the DFA to model the resources needed for
----------------
If you have a functional unit that issues in stages such that another instruction of needing the same FU can ussue the very next cycle, then isn't the sum of the cycles too great?  Example:

InstrItinData<IIC_MUL_rr,    [InstrStage<1, [MUL_DSP_STAGE1]>,InstrStage<1, [MUL_DSP_STAGE2]>,InstrStage<1, [MUL_DSP_STAGE3]>]>,

In this case multiplies will issue back-to-back and require 3 cycles to complete. If we have 2 multiplies then is ResMII = (2 * 3) / 1 = 6 when in reality  it will be 4 cycles since it's broken into stages.



http://reviews.llvm.org/D16829





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