[PATCH] D16315: [ppc64] Enable sibling call optimization on ppc64 ELFv1/ELFv2 abi

Chuang-Yu Cheng via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 5 07:45:04 PST 2016


cycheng added inline comments.

================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:3976
@@ +3975,3 @@
+  if (NeedStackSlotPassParameters(Subtarget, Outs)) {
+    // TODO: Allow SCO if caller and callee has same function prototype
+    return false;
----------------
hfinkel wrote:
> Are you planning on doing this in follow-up? It seems simple enough to check. Unless there's some complication here, I'd rather you do this up-front so that we get more testing coverage on all of the rest of the logic.
Then I can generate second patch quickly ; P

OK, I am going to fix it in this patch.

================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:4010
@@ +4009,3 @@
+    // Look at caller's 1st argument (struct-return pointer), get it's vreg id.
+    unsigned callerArg0Vreg = MF.getRegInfo().livein_begin()->second;
+
----------------
hfinkel wrote:
> hfinkel wrote:
> > Variables start with a capital letter.
> I don't think that the first live-in register in the list is guaranteed to be the first argument's register. Also, you say "vreg id"; are these virtual registers or physical registers at this point?
Mmmm.. I will try to find other method for getting first argument.

They are virtual registers.


http://reviews.llvm.org/D16315





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