[PATCH] D16842: [Power9] Implement new vsx instructions: insert, extract, test data class, min/max, reverse, permute, splat

Chuang-Yu Cheng via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 4 19:17:54 PST 2016

cycheng added a comment.

Thanks for your careful feedback :) I'll fix these issues you mentioned:

- Review all using of vsfrc, vssrc, vsrc, because I misunderstand its usage. It looks like
  1. vssrc: for VSX scalar single precision
  2. vsfrc:
    - for VSX scalar double precision fp, or single word, double word int
    - move instruction use vsfrc
  3. vsrc: for VSX vector instructions
- Make the instruction definition clear for XX2_RD6_UIM5_RS6: 5-bit immediate -> 4-bit immediate Review all other new instructions that have similar definition.
- Add format comment for each new form
- README_P9.txt: list each new instructions for
  1. Has likely SDAG match?
  2. Needs an intrinsic?
  3. Needs builtin?
  4. Miscellaneous notes
- Inline assembly test case: Need discuss with Kit


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