[PATCH] D14185: Extend SLP Vectorizer to deal with aggregates

Arch D. Robison via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 29 12:56:06 PST 2016


ArchDRobison marked 4 inline comments as done.

================
Comment at: lib/Transforms/Vectorize/SLPVectorizer.cpp:281
@@ +280,3 @@
+/// \returns True if Extract{Value,Element} instruction extracts element Idx.
+static bool matchExtractIndex(Instruction *E, unsigned Idx, unsigned Opcode) {
+  assert(Opcode == Instruction::ExtractElement ||
----------------
I changed it to `Idx`, since that seemed to be used in other spots for variables representing LLVM indices.

================
Comment at: lib/Transforms/Vectorize/SLPVectorizer.cpp:1500
@@ +1499,3 @@
+  uint64_t VTSize = DL.getTypeStoreSizeInBits(VectorType::get(EltTy, N));
+  if (VTSize < MinVecRegSize || VTSize > MaxVecRegSize || VTSize != DL.getTypeStoreSizeInBits(T))
+    return 0;
----------------
The fundamental issue is type-punning for load/store, so the "store size" seems more appropriate.  My recent comment for http://reviews.llvm.org/D14260 with the contrived i24 example says more.


http://reviews.llvm.org/D14185





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