[PATCH] D15420: [mips] Do not use SLL for ANY_EXTEND nodes as the high bits are undefined.

Daniel Sanders via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 29 06:43:32 PST 2016


dsanders accepted this revision.
dsanders added a comment.
This revision is now accepted and ready to land.

LGTM with the unused CHECKs and the assumption that the result of the fadd is $f0 fixed


================
Comment at: test/CodeGen/Mips/fcopysign-f32-f64.ll:11
@@ -10,2 +10,3 @@
 entry:
-; 64:     func2
+; CHECK-LABEL: func2:
+
----------------
This isn't checked anymore. 'CHECK' is only the default prefix when no prefixes are given.

================
Comment at: test/CodeGen/Mips/fcopysign-f32-f64.ll:34
@@ -32,12 +33,3 @@
 entry:
-
-; 64:     func3
-; 64-DAG: daddiu $[[T0:[0-9]+]], $zero, 1
-; 64-DAG: dsll   $[[T1:[0-9]+]], $[[T0]], 63
-; 64-DAG: daddiu $[[MSK0:[0-9]+]], $[[T1]], -1
-; 64-DAG: and    $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]]
-; 64-DAG: srl    $[[SRL:[0-9]+]], ${{[0-9]+}}, 31
-; 64-DAG: sll    $[[SLL:[0-9]+]], $[[SRL]], 0
-; 64-DAG: dsll   $[[DSLL:[0-9]+]], $[[SLL]], 63
-; 64:     or     $[[OR:[0-9]+]], $[[AND0]], $[[DSLL]]
-; 64:     dmtc1  $[[OR]], $f0
+; CHECK-LABEL: func3:
+
----------------
Likewise

================
Comment at: test/CodeGen/Mips/fcopysign-f32-f64.ll:36-45
@@ -44,1 +35,12 @@
+
+; 64-DAG: mfc1    $[[MFC:[0-9]+]], $f13
+; 64-DAG: srl     $[[SRL:[0-9]+]], $[[MFC:[0-9]+]], 31
+; 64:     dsll    $[[DSLL:[0-9]+]], $[[SRL]], 63
+; 64-DAG: daddiu  $[[R1:[0-9]+]], $zero, 1
+; 64-DAG: dsll    $[[R2:[0-9]+]], $[[R1]], 63
+; 64-DAG: daddiu  $[[R3:[0-9]+]], $[[R2]], -1
+; 64-DAG: dmfc1   $[[R0:[0-9]+]], $f0
+; 64:     and     $[[AND0:[0-9]+]], $[[R0]], $[[R3]]
+; 64:     or      $[[OR:[0-9]+]], $[[AND0]], $[[DSLL]]
+; 64:     dmtc1   $[[OR]], $f0
 
----------------
It's not for this patch but this output doesn't seem very efficient. For example, it could clear the top bit with a dsll+dsrl saving two instructions

================
Comment at: test/CodeGen/Mips/fcopysign-f32-f64.ll:42
@@ +41,3 @@
+; 64-DAG: daddiu  $[[R3:[0-9]+]], $[[R2]], -1
+; 64-DAG: dmfc1   $[[R0:[0-9]+]], $f0
+; 64:     and     $[[AND0:[0-9]+]], $[[R0]], $[[R3]]
----------------
This $f0 isn't guaranteed to be $f0.


http://reviews.llvm.org/D15420





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