[PATCH] D16659: AMDGPU: Implement known bits functions for min3/max3/med3

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 27 19:00:36 PST 2016

arsenm added inline comments.

Comment at: test/CodeGen/AMDGPU/llvm.amdgcn.smed3.ll:14-17
@@ -13,1 +13,6 @@
+; GCN-LABEL: {{^}}test_smed3_num_sign_bits:
+; GCN: v_med3_i32 [[RESULT:v[0-9]+]], s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
+; GCN-NEXT: buffer_store_dword [[RESULT]]
+define void @test_smed3_num_sign_bits(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 zeroext %src2) #1 {
tstellarAMD wrote:
> What exactly are these testing?  Is it just checking for crashes?
No, it's making sure the instructions after the med3 node are deleted


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