[PATCH] D15302: [Greedy regalloc] Replace analyzeSiblingValues with something new [Part1]
Wei Mi via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 26 10:20:41 PST 2016
wmi updated this revision to Diff 46011.
wmi added a comment.
Herald added subscribers: jyknight, srhines, danalbert, tberghammer.
I noticed a weakness of my hoistSpill patch: When a redundent spill is deleted, the RHS register may become dead and its live range can be shrinked. However, hoistSpill is done after register assignment so it cannot utilize the benefit of live range shrinking caused by deleting redundent spills. I also caught some testcases producing non-optimal code because of it.
To solve it, the best way now I can think of is to combine -split-spill-mode=size (Jakob's solution) and the hoistSpill patch here. So common cases of redundent spills can be deleted by -split-spill-mode=size during register allocation and redundent spills generated from different splitting rounds will be cleaned up by hoistSpill patch here. This combined way generated the best code from my analysis of llvm testsuites.
About compile time, I used spec2006 C/C++ benchmarks to do the evaluation.
hoistSpill + -split-spill-mode=size compared with base: -0.70% compile time decrease on average.
hoistSpill + -split-spill-mode=size compared with -split-spill-mode=size only: +0.18% compile time increase on average.
performance is generally neutral for llvm-testsuite and google benchmarks. except SingleSource/Benchmarks/Misc/mandel's degradation caused by problem1 below.
I reevaluated performance for hoistSpill + -split-spill-mode=size for llvm testsuite and google benchmarks. Generally they are neutral compared with trunk, except SingleSource/Benchmarks/Misc/mandel. mandel degradation is caused by problem1 below.
Addressed Quentin's comments. Code reorganized -- add a HoistSpiller class. Fix some bugs when -regalloc=pbqp and -regalloc=basic are used. Fix unit tests and add new unit tests.
1. Spill hoist inside BB. propagateSiblingValue has a good description about its benefit in the comment, and I found testcases generating non-optimal code without it. I plan to address it separately.
2. I deleted CodeGen/AArch64/aarch64-deferred-spilling.ll but I havn't got a good replacement for it. With the hoistSpill + -split-spill-mode=size patch, the pattern checked by the test doesn't appear anymore, and the test is relatively large so it is not easy to look closely whether it is just transformed to another appearance. I did see many cases that defer spills can get phyregs in the end and I got a few small testcases on x86. However, those are still somewhat fragile -- I found when I changed regalloc a little bit, the pattern disappeared.
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