[PATCH] D15887: [Power9] Implement new altivec instructions: permute, count zero, extend sign, negate, parity, shift/rotate, mul10

[Chuang-Yu Cheng via llvm-commits]

cycheng retitled this revision from "[Power9] Implement new vector permute, count zero instructions" to "[Power9] Implement new altivec instructions: permute, count zero, extend sign, negate, parity, shift/rotate, mul10 ".
cycheng updated the summary for this revision.
cycheng updated this revision to Diff 44743.
cycheng added a comment.

Changes:

- Follow naming convention to rename global and local instruction forms
- Add pattern parameter for local defined instruction forms
- Fix IsP9 position
- Add new instructions (I plan to use 2 patches to cover all new p9 altivec instructions, so http://reviews.llvm.org/D15916 and http://reviews.llvm.org/D15917 will be merged.)


http://reviews.llvm.org/D15887

Files:
  lib/Target/PowerPC/PPC.td
  lib/Target/PowerPC/PPCInstrAltivec.td
  lib/Target/PowerPC/PPCInstrFormats.td
  lib/Target/PowerPC/PPCSubtarget.cpp
  lib/Target/PowerPC/PPCSubtarget.h
  test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
  test/MC/PowerPC/ppc64-encoding-vmx.s

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