[PATCH] D9984: Refactor: Simplify boolean conditional return statements in lib/Target/PowerPC

Alexander Kornienko via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 28 05:42:21 PST 2015


This revision was automatically updated to reflect the committed changes.
Closed by commit rL256493: Refactor: Simplify boolean conditional return statements in lib/Target/PowerPC (authored by alexfh).

Changed prior to commit:
  http://reviews.llvm.org/D9984?vs=38331&id=43679#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D9984

Files:
  llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
  llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/trunk/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp

Index: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
===================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -1612,10 +1612,7 @@
           return false;
         }
 
-        if (VRI.RLAmt != EffRLAmt)
-          return false;
-
-        return true;
+        return VRI.RLAmt == EffRLAmt;
       };
 
       for (auto &BG : BitGroups) {
Index: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -11434,9 +11434,7 @@
   assert(Ty->isIntegerTy());
 
   unsigned BitSize = Ty->getPrimitiveSizeInBits();
-  if (BitSize == 0 || BitSize > 64)
-    return false;
-  return true;
+  return !(BitSize == 0 || BitSize > 64);
 }
 
 bool PPCTargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
Index: llvm/trunk/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
===================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
+++ llvm/trunk/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
@@ -164,9 +164,7 @@
   bool isRegInClass(unsigned Reg, const TargetRegisterClass *RC) {
     if (TargetRegisterInfo::isVirtualRegister(Reg))
       return RC->hasSubClassEq(MRI->getRegClass(Reg));
-    if (RC->contains(Reg))
-      return true;
-    return false;
+    return RC->contains(Reg);
   }
 
   // Return true iff the given register is a full vector register.
Index: llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
===================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
+++ llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
@@ -293,10 +293,7 @@
     return true;
 
   const auto *I = cast<Instruction>(V);
-  if (FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB)
-    return true;
-
-  return false;
+  return FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB;
 }
 
 // Given a value Obj, create an Address object Addr that represents its


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