[PATCH] D15735: AMDGPU/SI: Fix encoding of flat instructions on VI

[Matt Arsenault via llvm-commits]

arsenm added inline comments.

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Comment at: lib/Target/AMDGPU/CIInstructions.td:129
@@ +128,3 @@
+defm FLAT_LOAD_SSHORT : FLAT_Load_Helper <
+  flat<0xb,0x13>, "flat_load_sshort", VGPR_32>
+;
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missing spaces after ,

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Comment at: lib/Target/AMDGPU/SIInstrInfo.td:2598
@@ +2597,3 @@
+    dag outs = (outs regClass:$vdst),
+    dag ins = (ins VReg_64:$addr, glc_flat:$glc, slc_flat:$slc, tfe_flat:$tfe),
+    string asm = asm_name#" $vdst, $addr"#"$glc"#"$slc"#"$tfe"> {
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Why do these have different names? For TFE at least I'm pretty sure we will need separate opcodes for them, but I guess it can stay for now.

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Comment at: test/MC/AMDGPU/flat.s:4-8
@@ -3,4 +3,7 @@
 
-// FIXME: These instructions give an 'invalid operand' error on SI and should
-// instead be reporting an 'instruction not supported' error.
+// FIXME: For missing instruction the error message is:
+//  error: too few operands for instruction
+// It should be:
+//  error: instruction not supported on this GPU
+//
 
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I noticed this before. Can you file a bug for this


http://reviews.llvm.org/D15735