[PATCH] D15702: [AArch64] Optimize some simple TBZ/TBNZ cases.

Charlie Turner via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 22 10:57:10 PST 2015

chatur01 added a comment.

Hi Geoff, looks good. :-)

I have some potentially silly questions inline, just curiosities.

Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:9528
@@ +9527,3 @@
+  case ISD::AND:
+    if ((C->getZExtValue() >> Bit) & 1) {
+      return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG);
mcrosier wrote:
> Please remove the extra curly brackets.
Are there interesting cases where m[b]==0, so that you an elide the test and generate a direct branch? Or is that handled somewhere else in the compiler (please ignore if this would zap time to figure out, I'm only curious)

Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:9540
@@ +9539,3 @@
+    }
+    return Op;
Same here, f we shl > Bits, then we know x[Bit] == 0.


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