[PATCH] D15653: Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2

[Weiming Zhao via llvm-commits]

weimingz created this revision.
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Herald added subscribers: rengolin, aemerson.

r250597 fixed the mapping for ARM mode. We have to do the same for Thumb2 otherwise the same llvm.arm.ssat() will generate different saturating amount for ARM and Thumb.

Repository:
  rL LLVM

http://reviews.llvm.org/D15653

Files:
  lib/Target/ARM/ARMInstrThumb2.td
  test/CodeGen/ARM/sat-arith.ll

Index: test/CodeGen/ARM/sat-arith.ll
===================================================================
--- test/CodeGen/ARM/sat-arith.ll
+++ test/CodeGen/ARM/sat-arith.ll
@@ -1,54 +1,57 @@
-; RUN: llc -O1 -mtriple=armv6-none-none-eabi %s -o - | FileCheck %s
+; RUN: llc -O1 -mtriple=armv6-none-none-eabi %s -o - | FileCheck %s -check-prefix=ARM -check-prefix=CHECK
+; RUN: llc -O1 -mtriple=thumbv7-none-none-eabi %s -o - | FileCheck %s -check-prefix=THUMB -check-prefix=CHECK
 
 ; CHECK-LABEL: qadd
 define i32 @qadd() nounwind {
-; CHECK: mov [[R0:.*]], #8
-; CHECK: mov [[R1:.*]], #128
-; CHECK: qadd [[R0]], [[R1]], [[R0]]
+; CHECK-DAG: mov{{s?}} [[R0:.*]], #8
+; CHECK-DAG: mov{{s?}} [[R1:.*]], #128
+; CHECK-ARM: qadd [[R0]], [[R1]], [[R0]]
+; CHECK-THRUMB: qadd [[R0]], [[R0]], [[R1]]
   %tmp = call i32 @llvm.arm.qadd(i32 128, i32 8)
   ret i32 %tmp
 }
 
 ; CHECK-LABEL: qsub
 define i32 @qsub() nounwind {
-; CHECK: mov [[R0:.*]], #8
-; CHECK: mov [[R1:.*]], #128
-; CHECK: qsub [[R0]], [[R1]], [[R0]]
+; CHECK-DAG: mov{{s?}} [[R0:.*]], #8
+; CHECK-DAG: mov{{s?}} [[R1:.*]], #128
+; CHECK-ARM: qsub [[R0]], [[R1]], [[R0]]
+; CHECK-THRUMB: qadd [[R0]], [[R1]], [[R0]]
   %tmp = call i32 @llvm.arm.qsub(i32 128, i32 8)
   ret i32 %tmp
 }
 
 ; upper-bound of the immediate argument
 ; CHECK-LABEL: ssat1
 define i32 @ssat1() nounwind {
-; CHECK: mov [[R0:.*]], #128
+; CHECK: mov{{s?}} [[R0:.*]], #128
 ; CHECK: ssat [[R1:.*]], #32, [[R0]]
   %tmp = call i32 @llvm.arm.ssat(i32 128, i32 32)
   ret i32 %tmp
 }
 
 ; lower-bound of the immediate argument
 ; CHECK-LABEL: ssat2
 define i32 @ssat2() nounwind {
-; CHECK: mov [[R0:.*]], #128
+; CHECK: mov{{s?}} [[R0:.*]], #128
 ; CHECK: ssat [[R1:.*]], #1, [[R0]]
   %tmp = call i32 @llvm.arm.ssat(i32 128, i32 1)
   ret i32 %tmp
 }
 
 ; upper-bound of the immediate argument
 ; CHECK-LABEL: usat1
 define i32 @usat1() nounwind {
-; CHECK: mov [[R0:.*]], #128
+; CHECK: mov{{s?}} [[R0:.*]], #128
 ; CHECK: usat [[R1:.*]], #31, [[R0]]
   %tmp = call i32 @llvm.arm.usat(i32 128, i32 31)
   ret i32 %tmp
 }
 
 ; lower-bound of the immediate argument
 ; CHECK-LABEL: usat2
 define i32 @usat2() nounwind {
-; CHECK: mov [[R0:.*]], #128
+; CHECK: mov{{s?}} [[R0:.*]], #128
 ; CHECK: usat [[R1:.*]], #0, [[R0]]
   %tmp = call i32 @llvm.arm.usat(i32 128, i32 0)
   ret i32 %tmp
Index: lib/Target/ARM/ARMInstrThumb2.td
===================================================================
--- lib/Target/ARM/ARMInstrThumb2.td
+++ lib/Target/ARM/ARMInstrThumb2.td
@@ -2291,8 +2291,8 @@
   let Inst{5-4} = 0b00;
 }
 
-def : T2Pat<(int_arm_ssat GPR:$a, imm:$pos), (t2SSAT imm:$pos, GPR:$a, 0)>;
-def : T2Pat<(int_arm_usat GPR:$a, imm:$pos), (t2USAT imm:$pos, GPR:$a, 0)>;
+def : T2Pat<(int_arm_ssat GPR:$a, imm1_32:$pos), (t2SSAT imm1_32:$pos, GPR:$a, 0)>;
+def : T2Pat<(int_arm_usat GPR:$a, imm0_31:$pos), (t2USAT imm0_31:$pos, GPR:$a, 0)>;
 
 //===----------------------------------------------------------------------===//
 //  Shift and rotate Instructions.


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