[PATCH] D14822: [mips][microMIPS] Add R_MICROMIPS_PC26_S1 relocation
Daniel Sanders via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 17 06:40:38 PST 2015
dsanders added inline comments.
Comment at: lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp:370
@@ +369,3 @@
+ const MCExpr *FixupExpression = MCBinaryExpr::createAdd(
+ MO.getExpr(), MCConstantExpr::create(-4, Ctx), Ctx);
+ Fixups.push_back(MCFixup::create(0, FixupExpression,
> dsanders wrote:
> > Is it still -4 when we're shifting by 1 instead of 2?
> If my understanding is correct -4 is defined only by the size of current instruction (balc and bc in this case) and it is 4 bytes:
> "... is added to the address of the instruction following the
> branch (not the branch itself), to form a PC-relative effective target address"
> " Operation:
> target_offset <- sign_extend( offset || 01 )
> GPR <- PC+4
> PC <- PC+4 + sign_extend(target_offset)"
That makes sense. Thanks.
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