[PATCH] D14806: MachineScheduler: Add a target hook for deciding which RegPressure sets to increase

Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 16 10:34:12 PST 2015


This revision was automatically updated to reflect the committed changes.
Closed by commit rL255795: MachineScheduler: Add a target hook for deciding which RegPressure sets to (authored by tstellar).

Changed prior to commit:
  http://reviews.llvm.org/D14806?vs=42748&id=43032#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D14806

Files:
  llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
  llvm/trunk/lib/CodeGen/MachineScheduler.cpp

Index: llvm/trunk/lib/CodeGen/MachineScheduler.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/MachineScheduler.cpp
+++ llvm/trunk/lib/CodeGen/MachineScheduler.cpp
@@ -2579,11 +2579,13 @@
                         const PressureChange &CandP,
                         GenericSchedulerBase::SchedCandidate &TryCand,
                         GenericSchedulerBase::SchedCandidate &Cand,
-                        GenericSchedulerBase::CandReason Reason) {
-  int TryRank = TryP.getPSetOrMax();
-  int CandRank = CandP.getPSetOrMax();
+                        GenericSchedulerBase::CandReason Reason,
+                        const TargetRegisterInfo *TRI,
+                        const MachineFunction &MF) {
+  unsigned TryPSet = TryP.getPSetOrMax();
+  unsigned CandPSet = CandP.getPSetOrMax();
   // If both candidates affect the same set, go with the smallest increase.
-  if (TryRank == CandRank) {
+  if (TryPSet == CandPSet) {
     return tryLess(TryP.getUnitInc(), CandP.getUnitInc(), TryCand, Cand,
                    Reason);
   }
@@ -2593,6 +2595,13 @@
                  Reason)) {
     return true;
   }
+
+  int TryRank = TryP.isValid() ? TRI->getRegPressureSetScore(MF, TryPSet) :
+                                 std::numeric_limits<int>::max();
+
+  int CandRank = CandP.isValid() ? TRI->getRegPressureSetScore(MF, CandPSet) :
+                                   std::numeric_limits<int>::max();
+
   // If the candidates are decreasing pressure, reverse priority.
   if (TryP.getUnitInc() < 0)
     std::swap(TryRank, CandRank);
@@ -2695,13 +2704,15 @@
   // Avoid exceeding the target's limit.
   if (DAG->isTrackingPressure() && tryPressure(TryCand.RPDelta.Excess,
                                                Cand.RPDelta.Excess,
-                                               TryCand, Cand, RegExcess))
+                                               TryCand, Cand, RegExcess, TRI,
+                                               DAG->MF))
     return;
 
   // Avoid increasing the max critical pressure in the scheduled region.
   if (DAG->isTrackingPressure() && tryPressure(TryCand.RPDelta.CriticalMax,
                                                Cand.RPDelta.CriticalMax,
-                                               TryCand, Cand, RegCritical))
+                                               TryCand, Cand, RegCritical, TRI,
+                                               DAG->MF))
     return;
 
   // For loops that are acyclic path limited, aggressively schedule for latency.
@@ -2737,7 +2748,8 @@
   // Avoid increasing the max pressure of the entire region.
   if (DAG->isTrackingPressure() && tryPressure(TryCand.RPDelta.CurrentMax,
                                                Cand.RPDelta.CurrentMax,
-                                               TryCand, Cand, RegMax))
+                                               TryCand, Cand, RegMax, TRI,
+                                               DAG->MF))
     return;
 
   // Avoid critical resource consumption and balance the schedule.
Index: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
===================================================================
--- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
+++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
@@ -668,6 +668,15 @@
     return 0;
   }
 
+  /// Return a heuristic for the machine scheduler to compare the profitability
+  /// of increasing one register pressure set versus another.  The scheduler
+  /// will prefer increasing the register pressure of the set which returns
+  /// the largest value for this function.
+  virtual unsigned getRegPressureSetScore(const MachineFunction &MF,
+                                          unsigned PSetID) const {
+    return PSetID;
+  }
+
   /// Get the weight in units of pressure for this register class.
   virtual const RegClassWeight &getRegClassWeight(
     const TargetRegisterClass *RC) const = 0;


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