[llvm] r255583 - [X86] Add relaxtion logic for SBB instructions.

[Quentin Colombet via llvm-commits]

Author: qcolombet
Date: Mon Dec 14 18:09:23 2015
New Revision: 255583

URL: http://llvm.org/viewvc/llvm-project?rev=255583&view=rev
Log:
[X86] Add relaxtion logic for SBB instructions.

Prior to this patch, we would wrongly stick to the variant with imm8 encoding
even when the relocation could not fit that size.

rdar://problem/23785506

Modified:
    llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
    llvm/trunk/test/MC/ELF/relax-arith.s

Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp?rev=255583&r1=255582&r2=255583&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp (original)
+++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp Mon Dec 14 18:09:23 2015
@@ -220,6 +220,14 @@ static unsigned getRelaxedOpcodeArith(un
   case X86::SUB64ri8: return X86::SUB64ri32;
   case X86::SUB64mi8: return X86::SUB64mi32;
 
+   // SBB
+  case X86::SBB16ri8: return X86::SBB16ri;
+  case X86::SBB16mi8: return X86::SBB16mi;
+  case X86::SBB32ri8: return X86::SBB32ri;
+  case X86::SBB32mi8: return X86::SBB32mi;
+  case X86::SBB64ri8: return X86::SBB64ri32;
+  case X86::SBB64mi8: return X86::SBB64mi32;
+
     // CMP
   case X86::CMP16ri8: return X86::CMP16ri;
   case X86::CMP16mi8: return X86::CMP16mi;

Modified: llvm/trunk/test/MC/ELF/relax-arith.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relax-arith.s?rev=255583&r1=255582&r2=255583&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relax-arith.s (original)
+++ llvm/trunk/test/MC/ELF/relax-arith.s Mon Dec 14 18:09:23 2015
@@ -139,3 +139,19 @@ bar:
         adcl $foo, bar
         adc  $foo, %rbx
         adcq $foo, bar
+
+// CHECK:      Disassembly of section sbb:
+// CHECK-NEXT: sbb:
+// CHECK-NEXT:   0: 66 81 db 00 00                       sbbw $0, %bx
+// CHECK-NEXT:   5: 66 81 1c 25 00 00 00 00 00 00        sbbw $0, 0
+// CHECK-NEXT:   f: 81 db 00 00 00 00                    sbbl $0, %ebx
+// CHECK-NEXT:  15: 81 1c 25 00 00 00 00 00 00 00 00     sbbl $0, 0
+// CHECK-NEXT:  20: 48 81 db 00 00 00 00                 sbbq $0, %rbx
+// CHECK-NEXT:  27: 48 81 1c 25 00 00 00 00 00 00 00 00  sbbq $0, 0
+        .section sbb,"x"
+        sbb  $foo, %bx
+        sbbw $foo, bar
+        sbb  $foo, %ebx
+        sbbl $foo, bar
+        sbb  $foo, %rbx
+        sbbq $foo, bar