[PATCH] D15477: [X86][AVX] Only shuffle the lower half of vectors if the upper half is undefined

[Elena Demikhovsky via llvm-commits]

delena added inline comments.

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Comment at: lib/Target/X86/X86ISelLowering.cpp:22587
@@ +22586,3 @@
+  // vector_shuffle <X, X, X, X, u, u, u, u> or <X, X, u, u>
+  if (isUndefInRange(SVOp->getMask(), HalfNumElems, HalfNumElems)) {
+    // If the shuffle only uses the lower halves of the inputs,
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RKSimon wrote:
> delena wrote:
> > Hi Simon,
> > 
> > Why you are doing this in PerformShuffleCombine and not in the lowerVectorShuffle()? As far as I understand, we call "combine" in order to combine multiple nodes. In this case, you just optimize one node.
> Mainly because this has more in common with the 2 extract/insert patterns above than the canonicalization in lowerVectorShuffle. But I'm happy to move it (and the other 2?) there if you think necessary.
Yes. Thank you. It is the compilation time first of all.

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Comment at: test/CodeGen/X86/vector-shuffle-256-v16.ll:3287
@@ -3286,1 +3286,3 @@
 
+define <16 x i16> @shuffle_v16i16_3_3_3_3_3_3_3_3_u_u_u_u_u_u_u_u(<16 x i16> %a, <16 x i16> %b) {
+; ALL-LABEL: shuffle_v16i16_3_3_3_3_3_3_3_3_u_u_u_u_u_u_u_u:
----------------
This test and all tests bellow check the situation when one of the input vectors is not in use. But you, actually, optimize the case when the shuffle uses a half of V1 and a half of V2, right?


Repository:
  rL LLVM

http://reviews.llvm.org/D15477