[PATCH] [SelectionDAGBuilder] [Review request] incorrect reg class assigned after isel

[Hal Finkel via llvm-commits]

LGTM.

 -Hal

----- Original Message -----
> From: "Jonas Paulsson via llvm-commits" <llvm-commits at lists.llvm.org>
> To: llvm-commits at lists.llvm.org
> Sent: Tuesday, November 10, 2015 10:03:03 AM
> Subject: Re: [PATCH] [SelectionDAGBuilder] [Review request] incorrect reg class assigned after isel
> 
> ping!
> 
> ---
>  From 8f6c3f6699bbd0dcdfa1fba89101b9f71eae4bb8 Mon Sep 17 00:00:00
>  2001
> From: Jonas Paulsson <paulsson at linux.vnet.ibm.com>
> Date: Mon, 2 Nov 2015 09:31:20 +0100
> Subject: [PATCH] [SelectionDAGBuilder] Make sure DemoteReg ends up in
> right
>   reg-class.
> 
> The virtual register containing the address for returned value on
> stack should in the DAG be represented with a CopyFromReg node and
> not
> a Register node. Otherwise, InstrEmitter will not make sure that it
> ends up in the right register class for the target instruction.
> 
> SystemZ needs this, becuause the reg class for address registers is a
> subset of the general 64 bit register class.
> 
> test/SystemZ/CodeGen/args-07.ll and args-04.ll updated to run with
> -verify-machineinstrs.
> 
> ---
>   lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 3 ++-
>   test/CodeGen/SystemZ/args-04.ll                  | 2 +-
>   test/CodeGen/SystemZ/args-07.ll                  | 2 +-
>   3 files changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> index 8d04f47..71d2fcc 100644
> --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> @@ -1338,7 +1338,8 @@ void SelectionDAGBuilder::visitRet(const
> ReturnInst &I) {
>       ComputeValueVTs(TLI, DL,
>       PointerType::getUnqual(F->getReturnType()),
>                       PtrValueVTs);
> 
> -    SDValue RetPtr = DAG.getRegister(DemoteReg, PtrValueVTs[0]);
> +    SDValue RetPtr = DAG.getCopyFromReg(DAG.getEntryNode(),
> getCurSDLoc(),
> +                                        DemoteReg, PtrValueVTs[0]);
>       SDValue RetOp = getValue(I.getOperand(0));
> 
>       SmallVector<EVT, 4> ValueVTs;
> diff --git a/test/CodeGen/SystemZ/args-04.ll
> b/test/CodeGen/SystemZ/args-04.ll
> index 48a2cf4..475cceb 100644
> --- a/test/CodeGen/SystemZ/args-04.ll
> +++ b/test/CodeGen/SystemZ/args-04.ll
> @@ -1,7 +1,7 @@
>   ; Test incoming GPR, FPR and stack arguments when no extension type
>   is
> given.
>   ; This type of argument is used for passing structures, etc.
>   ;
> -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
> +; RUN: llc < %s -mtriple=s390x-linux-gnu -verify-machineinstrs |
> FileCheck %s
> 
>   ; Do some arithmetic so that we can see the register being used.
>   define i8 @f1(i8 %r2) {
> diff --git a/test/CodeGen/SystemZ/args-07.ll
> b/test/CodeGen/SystemZ/args-07.ll
> index 29d9b31..44a31fa 100644
> --- a/test/CodeGen/SystemZ/args-07.ll
> +++ b/test/CodeGen/SystemZ/args-07.ll
> @@ -1,6 +1,6 @@
>   ; Test multiple return values (LLVM ABI extension)
>   ;
> -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
> +; RUN: llc < %s -mtriple=s390x-linux-gnu -verify-machineinstrs|
> FileCheck %s
> 
>   ; Up to four integer return values fit into GPRs.
>   define { i64, i64, i64, i64 } @f1() {
> --
> 
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-- 
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory