[PATCH] D15387: [compiler-rt] [msan] Variadic support for AArch64

[Adhemerval Zanella via llvm-commits]

zatrazz added inline comments.

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Comment at: lib/msan/msan.cc:58
@@ -57,3 +57,3 @@
 SANITIZER_INTERFACE_ATTRIBUTE
-THREADLOCAL u64 __msan_va_arg_tls[kMsanParamTlsSize / sizeof(u64)];
+ALIGNED(16) THREADLOCAL u64 __msan_va_arg_tls[kMsanParamTlsSize / sizeof(u64)];
 
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eugenis wrote:
> eugenis wrote:
> > This only aligns the first element of the array. Why is that sufficient?
> > Do you need to change instrumentation as well to align each next store location to 16 bytes?
> > 
> OK, just saw the instrumentation change.
Aligning the first element is just what it requires, since the instrumentation phase will store in a 16 aligned offset (64 currently).


http://reviews.llvm.org/D15387