[PATCH] D15361: Do not lower VSETCC if operand is an f16 vector

[Pirama Arumuga Nainar via llvm-commits]

pirama created this revision.
pirama added reviewers: ab, jmolloy.
pirama added subscribers: llvm-commits, srhines.

SETCC with f16 vectors has OperationAction set to Expand but still gets
lowered to FCM* intrinsics based on its result type.  This patch skips
lowering of VSETCC if the operand is an f16 vector.

v4 and v8 tests included.

http://reviews.llvm.org/D15361

Files:
  lib/Target/AArch64/AArch64ISelLowering.cpp
  test/CodeGen/AArch64/fp16-v4-instructions.ll
  test/CodeGen/AArch64/fp16-v8-instructions.ll

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