[llvm] r255018 - [mips][ias] Range check uimm8 operands

Daniel Sanders via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 8 06:42:11 PST 2015


Author: dsanders
Date: Tue Dec  8 08:42:10 2015
New Revision: 255018

URL: http://llvm.org/viewvc/llvm-project?rev=255018&view=rev
Log:
[mips][ias] Range check uimm8 operands

Summary:

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D15226

Modified:
    llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
    llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
    llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td
    llvm/trunk/test/MC/Mips/msa/invalid-64.s
    llvm/trunk/test/MC/Mips/msa/invalid.s

Modified: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=255018&r1=255017&r2=255018&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp Tue Dec  8 08:42:10 2015
@@ -3650,6 +3650,9 @@ bool MipsAsmParser::MatchAndEmitInstruct
   case Match_UImm6_0:
     return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
                  "expected 6-bit unsigned immediate");
+  case Match_UImm8_0:
+    return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
+                 "expected 8-bit unsigned immediate");
   }
 
   llvm_unreachable("Implement any new match types added!");

Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=255018&r1=255017&r2=255018&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Tue Dec  8 08:42:10 2015
@@ -394,8 +394,10 @@ class ConstantUImmAsmOperandClass<int Bi
   let DiagnosticType = "UImm" # Bits # "_" # Offset;
 }
 
+def ConstantUImm8AsmOperandClass
+    : ConstantUImmAsmOperandClass<8, []>;
 def ConstantUImm6AsmOperandClass
-    : ConstantUImmAsmOperandClass<6, []>;
+    : ConstantUImmAsmOperandClass<6, [ConstantUImm8AsmOperandClass]>;
 def ConstantUImm5Plus32AsmOperandClass
     : ConstantUImmAsmOperandClass<5, [ConstantUImm6AsmOperandClass], 32>;
 def ConstantUImm5Plus32NormalizeAsmOperandClass
@@ -512,7 +514,7 @@ def uimmz       : Operand<i32> {
 }
 
 // Unsigned Operands
-foreach I = {1, 2, 3, 4, 5, 6} in
+foreach I = {1, 2, 3, 4, 5, 6, 8} in
   def uimm # I : Operand<i32> {
     let PrintMethod = "printUnsignedImm";
     let ParserMatchClass =

Modified: llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td?rev=255018&r1=255017&r2=255018&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td Tue Dec  8 08:42:10 2015
@@ -78,10 +78,6 @@ def uimm6_ptr : Operand<iPTR> {
   let PrintMethod = "printUnsignedImm8";
 }
 
-def uimm8 : Operand<i32> {
-  let PrintMethod = "printUnsignedImm8";
-}
-
 def simm5 : Operand<i32>;
 
 def vsplat_uimm1 : Operand<vAny> {

Modified: llvm/trunk/test/MC/Mips/msa/invalid-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/msa/invalid-64.s?rev=255018&r1=255017&r2=255018&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/msa/invalid-64.s (original)
+++ llvm/trunk/test/MC/Mips/msa/invalid-64.s Tue Dec  8 08:42:10 2015
@@ -37,6 +37,9 @@
     sat_u.w $w31, $w31, 32  # CHECK: :[[@LINE]]:25: error: expected 5-bit unsigned immediate
     sat_u.d $w31, $w31, -1  # CHECK: :[[@LINE]]:25: error: expected 6-bit unsigned immediate
     sat_u.d $w31, $w31, 64  # CHECK: :[[@LINE]]:25: error: expected 6-bit unsigned immediate
+    shf.b $w19, $w30, -1    # CHECK: :[[@LINE]]:23: error: expected 8-bit unsigned immediate
+    shf.h $w17, $w8, -1     # CHECK: :[[@LINE]]:22: error: expected 8-bit unsigned immediate
+    shf.w $w14, $w3, -1     # CHECK: :[[@LINE]]:22: error: expected 8-bit unsigned immediate
     sldi.b $w0, $w29[-1]    # CHECK: :[[@LINE]]:22: error: expected 4-bit unsigned immediate
     sldi.b $w0, $w29[16]    # CHECK: :[[@LINE]]:22: error: expected 4-bit unsigned immediate
     sldi.d $w4, $w12[-1]    # CHECK: :[[@LINE]]:22: error: expected 1-bit unsigned immediate

Modified: llvm/trunk/test/MC/Mips/msa/invalid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/msa/invalid.s?rev=255018&r1=255017&r2=255018&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/msa/invalid.s (original)
+++ llvm/trunk/test/MC/Mips/msa/invalid.s Tue Dec  8 08:42:10 2015
@@ -35,6 +35,12 @@
     sat_u.w $w31, $w31, 32  # CHECK: :[[@LINE]]:25: error: expected 5-bit unsigned immediate
     sat_u.d $w31, $w31, -1  # CHECK: :[[@LINE]]:25: error: expected 6-bit unsigned immediate
     sat_u.d $w31, $w31, 64  # CHECK: :[[@LINE]]:25: error: expected 6-bit unsigned immediate
+    shf.b $w19, $w30, -1    # CHECK: :[[@LINE]]:23: error: expected 8-bit unsigned immediate
+    shf.b $w19, $w30, 256   # CHECK: :[[@LINE]]:23: error: expected 8-bit unsigned immediate
+    shf.h $w17, $w8, -1     # CHECK: :[[@LINE]]:22: error: expected 8-bit unsigned immediate
+    shf.h $w17, $w8, 256    # CHECK: :[[@LINE]]:22: error: expected 8-bit unsigned immediate
+    shf.w $w14, $w3, -1     # CHECK: :[[@LINE]]:22: error: expected 8-bit unsigned immediate
+    shf.w $w14, $w3, 256    # CHECK: :[[@LINE]]:22: error: expected 8-bit unsigned immediate
     sldi.b $w0, $w29[-1]    # CHECK: :[[@LINE]]:22: error: expected 4-bit unsigned immediate
     sldi.b $w0, $w29[16]    # CHECK: :[[@LINE]]:22: error: expected 4-bit unsigned immediate
     sldi.d $w4, $w12[-1]    # CHECK: :[[@LINE]]:22: error: expected 1-bit unsigned immediate




More information about the llvm-commits mailing list