[PATCH] D15111: AMDGPU/SI: Don't emit group segment global variables

Tom Stellard via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 1 14:13:39 PST 2015


tstellarAMD updated this revision to Diff 41562.
tstellarAMD added a comment.

Get Triple from Targetmachine.


http://reviews.llvm.org/D15111

Files:
  lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
  lib/Target/AMDGPU/AMDGPUAsmPrinter.h
  lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
  test/CodeGen/AMDGPU/hsa-group-segment.ll

Index: test/CodeGen/AMDGPU/hsa-group-segment.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/hsa-group-segment.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s
+
+ at internal_group = internal addrspace(3) global i32 undef
+ at external_group = addrspace(3) global i32 undef
+
+define void @test() {
+entry:
+  store i32 0, i32 addrspace(3)* @internal_group
+  store i32 0, i32 addrspace(3)* @external_group
+  ret void
+}
+
+; HSA-NOT: internal_group:
+; HSA-NOT: external_group:
Index: lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
===================================================================
--- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+++ lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
@@ -15,6 +15,7 @@
 namespace llvm {
 
 class FeatureBitset;
+class GlobalValue;
 class MCContext;
 class MCSection;
 
@@ -31,6 +32,8 @@
                                const FeatureBitset &Features);
 MCSection *getHSATextSection(MCContext &Ctx);
 
+bool isGroupSegment(const GlobalValue *GV);
+
 } // end namespace AMDGPU
 } // end namespace llvm
 
Index: lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
===================================================================
--- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -7,6 +7,8 @@
 //
 //===----------------------------------------------------------------------===//
 #include "AMDGPUBaseInfo.h"
+#include "AMDGPU.h"
+#include "llvm/IR/GlobalValue.h"
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCSectionELF.h"
 #include "llvm/MC/SubtargetFeature.h"
@@ -66,5 +68,9 @@
                            ELF::SHF_AMDGPU_HSA_CODE);
 }
 
+bool isGroupSegment(const GlobalValue *GV) {
+  return GV->getType()->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS;
+}
+
 } // End namespace AMDGPU
 } // End namespace llvm
Index: lib/Target/AMDGPU/AMDGPUAsmPrinter.h
===================================================================
--- lib/Target/AMDGPU/AMDGPUAsmPrinter.h
+++ lib/Target/AMDGPU/AMDGPUAsmPrinter.h
@@ -103,6 +103,8 @@
 
   void EmitFunctionEntryLabel() override;
 
+  void EmitGlobalVariable(const GlobalVariable *GV) override;
+
   bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
                        unsigned AsmVariant, const char *ExtraCode,
                        raw_ostream &O) override;
Index: lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -123,6 +123,14 @@
   AsmPrinter::EmitFunctionEntryLabel();
 }
 
+void AMDGPUAsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) {
+
+  const Module *M = GV->getParent();
+  if (TM.getTargetTriple().getOS() != Triple::AMDHSA ||
+      !AMDGPU::isGroupSegment(GV))
+    return AsmPrinter::EmitGlobalVariable(GV);
+}
+
 bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
 
   // The starting address of all shader programs must be 256 bytes aligned.


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