[PATCH] D15047: [Mips64] Fix extension of 32-bit integer types.

[Daniel Sanders via llvm-commits]

dsanders added a comment.

This is the same problem Vasileios ran into when he removed some redundant sign extends. The root of the problem is that the legalized SelectionDAG isn't actually legal for MIPS64 since we don't have any 32-bit comparison operations (setlt and friends compare GPR-width values and produce a GPR-width 0 or 1). The legalizer should be promoting both the operands and result of the setcc to i64 which will result in the following DAG:

  t0: ch = EntryToken
              t2: i64,ch = CopyFromReg t0, Register:i64 %vreg0
            t4: i64 = AssertZext t2, ValueType:ch:i32
          t5: i32 = truncate t4
        t6: i64 = sext t5
      t20: i64 = setcc t6, Constant:i64<-1>, setgt:ch
    t12: ch = brcond t0, t20, BasicBlock:ch<if.else 0x14ad3e0>
  t14: ch = br t12, BasicBlock:ch<if.then4 0x14ad318>

the `t6: i64 = sext t5` will then lead to a sll instruction.

One other thing to mention is that the redundant SLL instructions you mention in:

> After this change, for arguments zeroext i1, zeroext i8 and zeroext i16, we got redundant SLL instruction.


are needed to promote the i8 to an i32 (which as noted above, should be an i64) for use in the signed comparison.


Repository:
  rL LLVM

http://reviews.llvm.org/D15047