[PATCH] D15014: [AArch64] Add ARMv8.2-A FP16 scalar instructions

[Oliver Stannard via llvm-commits]

olista01 created this revision.
olista01 added a reviewer: t.p.northover.
olista01 added a subscriber: llvm-commits.
olista01 set the repository for this revision to rL LLVM.
Herald added subscribers: rengolin, aemerson.

ARMv8.2-A adds 16-bit floating point versions of all existing VFP
floating-point instructions. This is an optional extension, so all of
these instructions require the FeatureFullFP16 subtarget feature.

Most of these instructions are the same as the 32- and 64-bit versions,
but with the type field (bits 23-22) set to 0b11. Previously the top bit
of the size field was always 0, so the instruction classes only provided
a 1-bit size field, which I have widened to 2 bits.

Repository:
  rL LLVM

http://reviews.llvm.org/D15014

Files:
  lib/Target/AArch64/AArch64InstrFormats.td
  lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
  test/MC/AArch64/arm64-fp-encoding.s
  test/MC/AArch64/basic-a64-diagnostics.s
  test/MC/Disassembler/AArch64/arm64-scalar-fp.txt
  test/MC/Disassembler/AArch64/basic-a64-instructions.txt
  test/MC/Disassembler/AArch64/fullfp16-neg.txt

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