[PATCH] D14588: [X86][SSE] Transform truncation from v8i32/v16i32 to v8i8/v16i8 into bitand and X86ISD::PACKUS operations during DAG combine.

[Simon Pilgrim via llvm-commits]

RKSimon added a comment.

I think you need to rebase after http://reviews.llvm.org/rL253952

You should be able to support packing with packssdw as well - it would allow us to truncate vXi32 -> vXi16 on SSE2 targets


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Comment at: test/CodeGen/X86/vector-trunc.ll:270
@@ -292,2 +269,3 @@
 ; SSSE3-LABEL: trunc16i32_16i8:
 ; SSSE3:       # BB#0: # %entry
+; SSSE3-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
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Aren't the SSE2/SSSE3/SSSE41 checks the same now? Shouldn't they just use SSE-CHECK ? Try to use update_llc_test_checks.py if you can.


http://reviews.llvm.org/D14588