[PATCH] [PostRA scheduling] Allow a subtarget to do scheduling when it wants post RA

[Jonas Paulsson via llvm-commits]

Hi,

As it says in Passes.cpp about post RA scheduling pass insertion:

...
// Ideally it wouldn't be part of the standard pass pipeline, and the 
target would just add
// a PostRA scheduling pass wherever it wants.
...

With this comment in mind, I suspect that there may be some potential 
broader redesign of
command line options / subtarget methods awating, but this works for now.

Does anybody have an opinion / better suggestion, or is this acceptable?

http://reviews.llvm.org/D14928

/Jonas Paulsson

From: Jonas Paulsson <paulsson at linux.vnet.ibm.com>
Date: Mon, 23 Nov 2015 16:11:52 +0100
Subject: [PATCH] [PostRA scheduling] Allow a subtarget to do scheduling when
  it wants post RA.

SystemZ needs to do its scheduling after all other late optimizations,
and therefore the standard PostRAScheduler point in the pass sequence
is too early.

To allow the use of the PostMachineScheduler at an arbitrary (later)
point while not running the PostRAScheduler, it was necessary to add a
new method TargetSubtargetInfo::customPostRAScheduling(), otherwise
the scheduler will immediately abort.

Any target that wants to insert the PostMachineScheduler pass at a
custom place should override this method to return true.
---
  include/llvm/Target/TargetSubtargetInfo.h | 5 +++++
  lib/CodeGen/MachineScheduler.cpp          | 3 ++-
  lib/CodeGen/PostRASchedulerList.cpp       | 5 +++++
  3 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/include/llvm/Target/TargetSubtargetInfo.h 
b/include/llvm/Target/TargetSubtargetInfo.h
index d50aa49..71051ca 100644
--- a/include/llvm/Target/TargetSubtargetInfo.h
+++ b/include/llvm/Target/TargetSubtargetInfo.h
@@ -135,6 +135,11 @@ public:
    /// which is the preferred way to influence this.
    virtual bool enablePostRAScheduler() const;

+  /// True if subtarget is using the PostMachineScheduler at some
+  /// arbitrary point in the pass sequence while disabling the
+  /// PostRAScheduler.
+  virtual bool customPostRAScheduling() const { return false;};
+
    /// \brief True if the subtarget should run the atomic expansion pass.
    virtual bool enableAtomicExpand() const;

diff --git a/lib/CodeGen/MachineScheduler.cpp 
b/lib/CodeGen/MachineScheduler.cpp
index a13dab3..f3f937e 100644
--- a/lib/CodeGen/MachineScheduler.cpp
+++ b/lib/CodeGen/MachineScheduler.cpp
@@ -352,7 +352,8 @@ bool 
PostMachineScheduler::runOnMachineFunction(MachineFunction &mf) {
    if (skipOptnoneFunction(*mf.getFunction()))
      return false;

-  if (!mf.getSubtarget().enablePostRAScheduler()) {
+  if (!mf.getSubtarget().enablePostRAScheduler() &&
+      !mf.getSubtarget().customPostRAScheduling()) {
      DEBUG(dbgs() << "Subtarget disables post-MI-sched.\n");
      return false;
    }
diff --git a/lib/CodeGen/PostRASchedulerList.cpp 
b/lib/CodeGen/PostRASchedulerList.cpp
index b95dffd..6125d76 100644
--- a/lib/CodeGen/PostRASchedulerList.cpp
+++ b/lib/CodeGen/PostRASchedulerList.cpp
@@ -265,6 +265,11 @@ bool 
PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) {
    if (skipOptnoneFunction(*Fn.getFunction()))
      return false;

+  // Subtarget is doing scheduling at some other point in the pass
+  // sequence instead of now.
+  if (Fn.getSubtarget().customPostRAScheduling())
+    return false;
+
    TII = Fn.getSubtarget().getInstrInfo();
    MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
    AliasAnalysis *AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
-- 
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