[llvm] r253247 - Find available scratch register to use in function prologue and epilogue as part of shrink wrapping.
Kit Barton via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 16 12:22:16 PST 2015
Author: kbarton
Date: Mon Nov 16 14:22:15 2015
New Revision: 253247
URL: http://llvm.org/viewvc/llvm-project?rev=253247&view=rev
Log:
Find available scratch register to use in function prologue and epilogue as part of shrink wrapping.
Phabricator: http://reviews.llvm.org/D13955
Added:
llvm/trunk/test/CodeGen/PowerPC/BreakableToken-reduced.ll
Modified:
llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp
llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.h
llvm/trunk/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
llvm/trunk/test/CodeGen/PowerPC/retaddr2.ll
llvm/trunk/test/CodeGen/PowerPC/stack-realign.ll
Modified: llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp?rev=253247&r1=253246&r2=253247&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp Mon Nov 16 14:22:15 2015
@@ -556,6 +556,58 @@ void PPCFrameLowering::replaceFPWithReal
}
}
+bool PPCFrameLowering::findScratchRegister(MachineBasicBlock *MBB,
+ bool UseAtEnd,
+ unsigned *ScratchRegister) const {
+ RegScavenger RS;
+ unsigned R0 = Subtarget.isPPC64() ? PPC::X0 : PPC::R0;
+
+ if (ScratchRegister)
+ *ScratchRegister = R0;
+
+ // If MBB is an entry or exit block, use R0 as the scratch register
+ if ((UseAtEnd && MBB->isReturnBlock()) ||
+ (!UseAtEnd && (&MBB->getParent()->front() == MBB)))
+ return true;
+
+ RS.initRegState();
+ RS.enterBasicBlock(MBB);
+
+ // The scratch register will be used at the end of the block, so must consider
+ // all registers used within the block
+ if (UseAtEnd && MBB->begin() != MBB->getFirstTerminator())
+ RS.forward(MBB->getFirstTerminator());
+
+ if (!RS.isRegUsed(R0))
+ return true;
+
+ unsigned Reg = RS.FindUnusedReg(Subtarget.isPPC64() ? &PPC::G8RCRegClass
+ : &PPC::GPRCRegClass);
+
+ // Make sure the register scavenger was able to find an available register
+ // If not, use R0 but return false to indicate no register was available and
+ // R0 must be used (as recommended by the ABI)
+ if (Reg == 0)
+ return false;
+
+ if (ScratchRegister)
+ *ScratchRegister = Reg;
+
+ return true;
+}
+
+bool PPCFrameLowering::canUseAsPrologue(const MachineBasicBlock &MBB) const {
+ MachineBasicBlock *TmpMBB = const_cast<MachineBasicBlock *>(&MBB);
+
+ return findScratchRegister(TmpMBB, false, nullptr);
+}
+
+bool PPCFrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const {
+ MachineBasicBlock *TmpMBB = const_cast<MachineBasicBlock *>(&MBB);
+
+ return findScratchRegister(TmpMBB, true, nullptr);
+}
+
void PPCFrameLowering::emitPrologue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
MachineBasicBlock::iterator MBBI = MBB.begin();
@@ -613,7 +665,7 @@ void PPCFrameLowering::emitPrologue(Mach
unsigned BPReg = RegInfo->getBaseRegister(MF);
unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31;
unsigned LRReg = isPPC64 ? PPC::LR8 : PPC::LR;
- unsigned ScratchReg = isPPC64 ? PPC::X0 : PPC::R0;
+ unsigned ScratchReg = 0;
unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg
// ...(R12/X12 is volatile in both Darwin & SVR4, & can't be a function arg.)
const MCInstrDesc& MFLRInst = TII.get(isPPC64 ? PPC::MFLR8
@@ -642,6 +694,9 @@ void PPCFrameLowering::emitPrologue(Mach
assert((isPPC64 || !isSVR4ABI || !(!FrameSize && (MustSaveLR || HasFP))) &&
"FrameSize must be >0 to save/restore the FP or LR for 32-bit SVR4.");
+ findScratchRegister(&MBB, false, &ScratchReg);
+ assert(ScratchReg && "No scratch register!");
+
int LROffset = getReturnSaveOffset();
int FPOffset = 0;
@@ -950,7 +1005,7 @@ void PPCFrameLowering::emitEpilogue(Mach
unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1;
unsigned BPReg = RegInfo->getBaseRegister(MF);
unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31;
- unsigned ScratchReg = isPPC64 ? PPC::X0 : PPC::R0;
+ unsigned ScratchReg = 0;
unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg
const MCInstrDesc& MTLRInst = TII.get( isPPC64 ? PPC::MTLR8
: PPC::MTLR );
@@ -964,10 +1019,14 @@ void PPCFrameLowering::emitEpilogue(Mach
: PPC::ADDI );
const MCInstrDesc& AddInst = TII.get( isPPC64 ? PPC::ADD8
: PPC::ADD4 );
-
+
int LROffset = getReturnSaveOffset();
int FPOffset = 0;
+
+ findScratchRegister(&MBB, true, &ScratchReg);
+ assert(ScratchReg && "No scratch register!");
+
if (HasFP) {
if (isSVR4ABI) {
MachineFrameInfo *FFI = MF.getFrameInfo();
@@ -1062,7 +1121,6 @@ void PPCFrameLowering::emitEpilogue(Mach
.addImm(0)
.addReg(SPReg);
}
-
}
if (MustSaveLR)
Modified: llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.h?rev=253247&r1=253246&r2=253247&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.h Mon Nov 16 14:22:15 2015
@@ -29,6 +29,30 @@ class PPCFrameLowering: public TargetFra
const unsigned LinkageSize;
const unsigned BasePointerSaveOffset;
+ /**
+ * \brief Find a register that can be used in function prologue and epilogue
+ *
+ * Find a register that can be use as the scratch register in function
+ * prologue and epilogue to save various registers (Link Register, Base
+ * Pointer, etc.). Prefer R0, if it is available. If it is not available,
+ * then choose a different register.
+ *
+ * This method will return true if an available register was found (including
+ * R0). If no available registers are found, the method returns false and sets
+ * ScratchRegister to R0, as per the recommendation in the ABI.
+ *
+ * \param[in] MBB The machine basic block to find an available register for
+ * \param[in] UseAtEnd Specify whether the scratch register will be used at
+ * the end of the basic block (i.e., will the scratch
+ * register kill a register defined in the basic block)
+ * \param[out] ScratchRegister The scratch register to use
+ * \return true if a scratch register was found. false of a scratch register
+ * was not found and R0 is being used as the default.
+ */
+ bool findScratchRegister(MachineBasicBlock *MBB,
+ bool UseAtEnd,
+ unsigned *ScratchRegister) const;
+
public:
PPCFrameLowering(const PPCSubtarget &STI);
@@ -94,6 +118,11 @@ public:
getCalleeSavedSpillSlots(unsigned &NumEntries) const override;
bool enableShrinkWrapping(const MachineFunction &MF) const override;
+
+ /// Methods used by shrink wrapping to determine if MBB can be used for the
+ /// function prologue/epilogue.
+ bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
+ bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override;
};
} // End llvm namespace
Added: llvm/trunk/test/CodeGen/PowerPC/BreakableToken-reduced.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/BreakableToken-reduced.ll?rev=253247&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/BreakableToken-reduced.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/BreakableToken-reduced.ll Mon Nov 16 14:22:15 2015
@@ -0,0 +1,335 @@
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -enable-shrink-wrap=true %s -o - | FileCheck %s --check-prefix=CHECK
+;
+; Test the use of a non-R0 register to save/restore the LR in function
+; prologue/epilogue.
+; This problem can occur as a result of shrink wrapping, where the function
+; prologue and epilogue are moved from the beginning/ending of the function. If
+; register R0 is used before the prologue/epilogue blocks, then it cannot be
+; used to save/restore the LR.
+;
+; TODO: Convert this to an MIR test once the infrastructure can support it.
+; To convert this to an MIR pass, generate MIR after register allocation
+; but before shrink wrapping and verify that has been used in the body of
+; the function. This can be done with something like:
+; llc -stop-after stack-slot-coloring BreakableToken-reduced.ll > BreakableToken-reduced.mir
+;
+; The resulting MIR file can then be used as input to llc, and only run
+; shrink wrapping and Prologue/Epilogue insertion on it. For example:
+; llc -start-after stack-slot-coloring -stop-after prologepilog BreakableToken-reduced.mir
+;
+; Verify in the resulting code that R0 is not used in the prologue/epilogue.
+;
+; This currently cannot be done because the PrologEpilogInserter pass has
+; a dependency on the TargetPassConfig and StackProtector classes, which
+; are currently not serialized when generating the MIR.
+;
+
+; ModuleID = 'BreakableToken.cpp'
+target datalayout = "e-m:e-i64:64-n32:64"
+target triple = "powerpc64le-unknown-linux-gnu"
+
+%"class.clang::format::BreakableStringLiteral" = type { %"class.clang::format::BreakableSingleLineToken" }
+%"class.clang::format::BreakableSingleLineToken" = type { %"class.clang::format::BreakableToken", i32, %"class.llvm::StringRef", %"class.llvm::StringRef", %"class.llvm::StringRef" }
+%"class.clang::format::BreakableToken" = type { i32 (...)**, %"struct.clang::format::FormatToken"*, i32, i8, i32, %"struct.clang::format::FormatStyle"* }
+%"class.llvm::StringRef" = type { i8*, i64 }
+%"struct.clang::format::FormatToken" = type <{ %"class.clang::Token", i32, i8, [3 x i8], %"class.clang::SourceRange", i32, i32, i32, i8, i8, i8, i8, %"class.llvm::StringRef", i8, [3 x i8], i32, i32, i32, i8, i8, [2 x i8], i32, i32, i16, [2 x i8], %"class.std::unique_ptr", i32, i32, i32, i32, i32, i32, i32, i32, %"class.llvm::SmallVector", i32, i8, i8, [2 x i8], i32, i8, i8, [2 x i8], %"struct.clang::format::FormatToken"*, %"struct.clang::format::FormatToken"*, %"struct.clang::format::FormatToken"*, %"class.llvm::SmallVector.6", i32, i8, [3 x i8] }>
+%"class.clang::Token" = type <{ i32, i32, i8*, i16, i16, [4 x i8] }>
+%"class.clang::SourceRange" = type { %"class.clang::SourceLocation", %"class.clang::SourceLocation" }
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+%"class.llvm::SmallVectorImpl.base" = type { %"class.llvm::SmallVectorTemplateBase.base" }
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+%"class.std::vector" = type { %"struct.std::_Vector_base" }
+%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::basic_string<char>, std::allocator<std::basic_string<char> > >::_Vector_impl" }
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+%"class.llvm::RefCountedBase" = type { i32 }
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+%"struct.std::_Rb_tree<llvm::sys::fs::UniqueID, std::pair<const llvm::sys::fs::UniqueID, clang::DirectoryEntry>, std::_Select1st<std::pair<const llvm::sys::fs::UniqueID, clang::DirectoryEntry> >, std::less<llvm::sys::fs::UniqueID>, std::allocator<std::pair<const llvm::sys::fs::UniqueID, clang::DirectoryEntry> > >::_Rb_tree_impl" = type { %"struct.std::less", %"struct.std::_Rb_tree_node_base", i64 }
+%"struct.std::less" = type { i8 }
+%"struct.std::_Rb_tree_node_base" = type { i32, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"* }
+%"class.std::map.24" = type { %"class.std::_Rb_tree.25" }
+%"class.std::_Rb_tree.25" = type { %"struct.std::_Rb_tree<llvm::sys::fs::UniqueID, std::pair<const llvm::sys::fs::UniqueID, clang::FileEntry>, std::_Select1st<std::pair<const llvm::sys::fs::UniqueID, clang::FileEntry> >, std::less<llvm::sys::fs::UniqueID>, std::allocator<std::pair<const llvm::sys::fs::UniqueID, clang::FileEntry> > >::_Rb_tree_impl" }
+%"struct.std::_Rb_tree<llvm::sys::fs::UniqueID, std::pair<const llvm::sys::fs::UniqueID, clang::FileEntry>, std::_Select1st<std::pair<const llvm::sys::fs::UniqueID, clang::FileEntry> >, std::less<llvm::sys::fs::UniqueID>, std::allocator<std::pair<const llvm::sys::fs::UniqueID, clang::FileEntry> > >::_Rb_tree_impl" = type { %"struct.std::less", %"struct.std::_Rb_tree_node_base", i64 }
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+%"struct.llvm::detail::DenseMapPair" = type opaque
+%"class.std::unique_ptr.57" = type { %"class.std::tuple.58" }
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+%"struct.std::_Tuple_impl.59" = type { %"struct.std::_Head_base.64" }
+%"struct.std::_Head_base.64" = type { %"class.clang::FileSystemStatCache"* }
+%"class.clang::FileSystemStatCache" = type opaque
+%"class.llvm::BumpPtrAllocatorImpl" = type <{ i8*, i8*, %"class.llvm::SmallVector.41", %"class.llvm::SmallVector.47", i64, %"class.llvm::MallocAllocator", [7 x i8] }>
+%"class.llvm::SmallVector.41" = type { %"class.llvm::SmallVectorImpl.42", %"struct.llvm::SmallVectorStorage.46" }
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+%"class.clang::FileEntry" = type { i8*, i64, i64, %"class.clang::DirectoryEntry"*, i32, %"class.llvm::sys::fs::UniqueID", i8, i8, i8, %"class.std::unique_ptr.69" }
+%"class.clang::DirectoryEntry" = type { i8* }
+%"class.llvm::sys::fs::UniqueID" = type { i64, i64 }
+%"class.std::unique_ptr.69" = type { %"class.std::tuple.70" }
+%"class.std::tuple.70" = type { %"struct.std::_Tuple_impl.71" }
+%"struct.std::_Tuple_impl.71" = type { %"struct.std::_Head_base.76" }
+%"struct.std::_Head_base.76" = type { %"class.clang::vfs::File"* }
+%"class.clang::vfs::File" = type { i32 (...)** }
+%"class.std::unique_ptr.78" = type { %"class.std::tuple.79" }
+%"class.std::tuple.79" = type { %"struct.std::_Tuple_impl.80" }
+%"struct.std::_Tuple_impl.80" = type { %"struct.std::_Head_base.85" }
+%"struct.std::_Head_base.85" = type { %"struct.clang::SourceManager::OverriddenFilesInfoTy"* }
+%"struct.clang::SourceManager::OverriddenFilesInfoTy" = type { %"class.llvm::DenseMap.86", %"class.llvm::DenseSet" }
+%"class.llvm::DenseMap.86" = type <{ %"struct.llvm::detail::DenseMapPair.88"*, i32, i32, i32, [4 x i8] }>
+%"struct.llvm::detail::DenseMapPair.88" = type { %"struct.std::pair.89" }
+%"struct.std::pair.89" = type { %"class.clang::FileEntry"*, %"class.clang::FileEntry"* }
+%"class.llvm::DenseSet" = type { %"class.llvm::DenseMap.91" }
+%"class.llvm::DenseMap.91" = type <{ %"class.llvm::detail::DenseSetPair"*, i32, i32, i32, [4 x i8] }>
+%"class.llvm::detail::DenseSetPair" = type { %"class.clang::FileEntry"* }
+%"class.std::vector.94" = type { %"struct.std::_Vector_base.95" }
+%"struct.std::_Vector_base.95" = type { %"struct.std::_Vector_base<clang::SrcMgr::ContentCache *, std::allocator<clang::SrcMgr::ContentCache *> >::_Vector_impl" }
+%"struct.std::_Vector_base<clang::SrcMgr::ContentCache *, std::allocator<clang::SrcMgr::ContentCache *> >::_Vector_impl" = type { %"class.clang::SrcMgr::ContentCache"**, %"class.clang::SrcMgr::ContentCache"**, %"class.clang::SrcMgr::ContentCache"** }
+%"class.llvm::SmallVector.99" = type <{ %"class.llvm::SmallVectorImpl.100", %"struct.llvm::SmallVectorStorage.105", [7 x i8] }>
+%"class.llvm::SmallVectorImpl.100" = type { %"class.llvm::SmallVectorTemplateBase.101" }
+%"class.llvm::SmallVectorTemplateBase.101" = type { %"class.llvm::SmallVectorTemplateCommon.102" }
+%"class.llvm::SmallVectorTemplateCommon.102" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.103" }
+%"struct.llvm::AlignedCharArrayUnion.103" = type { %"struct.llvm::AlignedCharArray.104" }
+%"struct.llvm::AlignedCharArray.104" = type { [24 x i8] }
+%"struct.llvm::SmallVectorStorage.105" = type { i8 }
+%"class.std::vector.107" = type { %"struct.std::_Bvector_base" }
+%"struct.std::_Bvector_base" = type { %"struct.std::_Bvector_base<std::allocator<bool> >::_Bvector_impl" }
+%"struct.std::_Bvector_base<std::allocator<bool> >::_Bvector_impl" = type { %"struct.std::_Bit_iterator", %"struct.std::_Bit_iterator", i64* }
+%"struct.std::_Bit_iterator" = type { %"struct.std::_Bit_iterator_base.base", [4 x i8] }
+%"struct.std::_Bit_iterator_base.base" = type <{ i64*, i32 }>
+%"class.clang::ExternalSLocEntrySource" = type { i32 (...)** }
+%"class.clang::LineTableInfo" = type opaque
+%"class.clang::SrcMgr::ContentCache" = type <{ %"class.llvm::PointerIntPair", %"class.clang::FileEntry"*, %"class.clang::FileEntry"*, i32*, [5 x i8], [3 x i8] }>
+%"class.llvm::PointerIntPair" = type { i64 }
+%"class.clang::FileID" = type { i32 }
+%"class.llvm::DenseMap.111" = type <{ %"struct.llvm::detail::DenseMapPair.113"*, i32, i32, i32, [4 x i8] }>
+%"struct.llvm::detail::DenseMapPair.113" = type opaque
+%"class.llvm::DenseMap.115" = type <{ %"struct.llvm::detail::DenseMapPair.117"*, i32, i32, i32, [4 x i8] }>
+%"struct.llvm::detail::DenseMapPair.117" = type opaque
+%"class.clang::InBeforeInTUCacheEntry" = type { %"class.clang::FileID", %"class.clang::FileID", i8, %"class.clang::FileID", i32, i32 }
+%"class.std::unique_ptr.119" = type { %"class.std::tuple.120" }
+%"class.std::tuple.120" = type { %"struct.std::_Tuple_impl.121" }
+%"struct.std::_Tuple_impl.121" = type { %"struct.std::_Head_base.126" }
+%"struct.std::_Head_base.126" = type { %"class.llvm::MemoryBuffer"* }
+%"class.llvm::MemoryBuffer" = type { i32 (...)**, i8*, i8* }
+%"class.std::unique_ptr.127" = type { %"class.std::tuple.128" }
+%"class.std::tuple.128" = type { %"struct.std::_Tuple_impl.129" }
+%"struct.std::_Tuple_impl.129" = type { %"struct.std::_Head_base.134" }
+%"struct.std::_Head_base.134" = type { %"class.clang::SrcMgr::ContentCache"* }
+%"class.llvm::DenseMap.135" = type <{ %"struct.llvm::detail::DenseMapPair.137"*, i32, i32, i32, [4 x i8] }>
+%"struct.llvm::detail::DenseMapPair.137" = type opaque
+%"class.llvm::SmallVector.139" = type { %"class.llvm::SmallVectorImpl.140", %"struct.llvm::SmallVectorStorage.144" }
+%"class.llvm::SmallVectorImpl.140" = type { %"class.llvm::SmallVectorTemplateBase.141" }
+%"class.llvm::SmallVectorTemplateBase.141" = type { %"class.llvm::SmallVectorTemplateCommon.142" }
+%"class.llvm::SmallVectorTemplateCommon.142" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.143" }
+%"struct.llvm::AlignedCharArrayUnion.143" = type { %"struct.llvm::AlignedCharArray.104" }
+%"struct.llvm::SmallVectorStorage.144" = type { [1 x %"struct.llvm::AlignedCharArrayUnion.143"] }
+%"class.std::set" = type { %"class.std::_Rb_tree.145" }
+%"class.std::_Rb_tree.145" = type { %"struct.std::_Rb_tree<clang::tooling::Replacement, clang::tooling::Replacement, std::_Identity<clang::tooling::Replacement>, std::less<clang::tooling::Replacement>, std::allocator<clang::tooling::Replacement> >::_Rb_tree_impl" }
+%"struct.std::_Rb_tree<clang::tooling::Replacement, clang::tooling::Replacement, std::_Identity<clang::tooling::Replacement>, std::less<clang::tooling::Replacement>, std::allocator<clang::tooling::Replacement> >::_Rb_tree_impl" = type { %"struct.std::less.149", %"struct.std::_Rb_tree_node_base", i64 }
+%"struct.std::less.149" = type { i8 }
+
+
+; Function Attrs: nounwind
+; CHECK-LABEL: @_ZN5clang6format22BreakableStringLiteral11insertBreakEjjSt4pairImjERNS0_17WhitespaceManagerE
+
+; Load a value into R0 before saving the LR
+; CHECK: lwz 0, {{[0-9]+([0-9]+)}}
+
+; Ensure the LR is saved using a different register
+; CHECK: mflr {{[1-9]+}}
+
+; Ensure the LR is restored using a different register
+; CHECK: mtlr {{[0-9]+}}
+; CHECK: blr
+define void @_ZN5clang6format22BreakableStringLiteral11insertBreakEjjSt4pairImjERNS0_17WhitespaceManagerE(%"class.clang::format::BreakableStringLiteral"* nocapture readonly %this, i32 zeroext %LineIndex, i32 zeroext %TailOffset, [2 x i64] %Split.coerce, %"class.clang::format::WhitespaceManager"* dereferenceable(1504) %Whitespaces) unnamed_addr #1 align 2 {
+entry:
+ %Split.coerce.fca.0.extract = extractvalue [2 x i64] %Split.coerce, 0
+ %Split.coerce.fca.1.extract = extractvalue [2 x i64] %Split.coerce, 1
+ %StartColumn = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 1
+ %0 = load i32, i32* %StartColumn, align 8, !tbaa !2
+ %Prefix = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 2
+ %Length.i.19 = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 2, i32 1
+ %1 = load i64, i64* %Length.i.19, align 8, !tbaa !10
+ %cmp.i = icmp eq i64 %1, 0
+ br i1 %cmp.i, label %entry._ZNK4llvm9StringRef10startswithES0_.exit_crit_edge, label %if.end.i.i
+
+entry._ZNK4llvm9StringRef10startswithES0_.exit_crit_edge: ; preds = %entry
+ %agg.tmp7.sroa.0.0..sroa_cast.phi.trans.insert = bitcast %"class.llvm::StringRef"* %Prefix to i64*
+ %agg.tmp7.sroa.0.0.copyload.pre = load i64, i64* %agg.tmp7.sroa.0.0..sroa_cast.phi.trans.insert, align 8
+ br label %_ZNK4llvm9StringRef10startswithES0_.exit
+
+if.end.i.i: ; preds = %entry
+ %Data.i.20 = getelementptr inbounds %"class.llvm::StringRef", %"class.llvm::StringRef"* %Prefix, i64 0, i32 0
+ %2 = load i8*, i8** %Data.i.20, align 8, !tbaa !12
+ %lhsc = load i8, i8* %2, align 1
+ %phitmp.i = icmp eq i8 %lhsc, 64
+ %3 = ptrtoint i8* %2 to i64
+ br label %_ZNK4llvm9StringRef10startswithES0_.exit
+
+_ZNK4llvm9StringRef10startswithES0_.exit: ; preds = %entry._ZNK4llvm9StringRef10startswithES0_.exit_crit_edge, %if.end.i.i
+ %agg.tmp7.sroa.0.0.copyload = phi i64 [ %agg.tmp7.sroa.0.0.copyload.pre, %entry._ZNK4llvm9StringRef10startswithES0_.exit_crit_edge ], [ %3, %if.end.i.i ]
+ %4 = phi i1 [ false, %entry._ZNK4llvm9StringRef10startswithES0_.exit_crit_edge ], [ %phitmp.i, %if.end.i.i ]
+ %dec = sext i1 %4 to i32
+ %dec. = add i32 %dec, %0
+ %Tok = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 0, i32 1
+ %ref = load %"struct.clang::format::FormatToken"*, %"struct.clang::format::FormatToken"** %Tok, align 8, !tbaa !13
+ %conv = zext i32 %TailOffset to i64
+ %add = add i64 %Split.coerce.fca.0.extract, %conv
+ %add4 = add i64 %add, %1
+ %conv5 = trunc i64 %add4 to i32
+ %Split.sroa.2.8.extract.trunc = trunc i64 %Split.coerce.fca.1.extract to i32
+ %agg.tmp6.sroa.0.0..sroa_idx13 = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 3
+ %agg.tmp6.sroa.0.0..sroa_cast = bitcast %"class.llvm::StringRef"* %agg.tmp6.sroa.0.0..sroa_idx13 to i64*
+ %agg.tmp6.sroa.0.0.copyload = load i64, i64* %agg.tmp6.sroa.0.0..sroa_cast, align 8
+ %agg.tmp6.sroa.2.0..sroa_idx14 = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 3, i32 1
+ %agg.tmp6.sroa.2.0.copyload = load i64, i64* %agg.tmp6.sroa.2.0..sroa_idx14, align 8
+ %InPPDirective = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 0, i32 3
+ %5 = load i8, i8* %InPPDirective, align 4, !tbaa !34, !range !39
+ %tobool = icmp ne i8 %5, 0
+ %IndentLevel = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 0, i32 2
+ %6 = load i32, i32* %IndentLevel, align 8, !tbaa !33
+ %.fca.0.insert11 = insertvalue [2 x i64] undef, i64 %agg.tmp6.sroa.0.0.copyload, 0
+ %.fca.1.insert12 = insertvalue [2 x i64] %.fca.0.insert11, i64 %agg.tmp6.sroa.2.0.copyload, 1
+ %.fca.0.insert = insertvalue [2 x i64] undef, i64 %agg.tmp7.sroa.0.0.copyload, 0
+ %.fca.1.insert = insertvalue [2 x i64] %.fca.0.insert, i64 %1, 1
+ tail call void @_ZN5clang6format17WhitespaceManager24replaceWhitespaceInTokenERKNS0_11FormatTokenEjjN4llvm9StringRefES6_bjji(%"class.clang::format::WhitespaceManager"* nonnull %Whitespaces, %"struct.clang::format::FormatToken"* dereferenceable(272) %ref, i32 zeroext %conv5, i32 zeroext %Split.sroa.2.8.extract.trunc, [2 x i64] %.fca.1.insert12, [2 x i64] %.fca.1.insert, i1 zeroext %tobool, i32 zeroext 1, i32 zeroext %6, i32 signext %dec.) #9
+ ret void
+}
+
+; Function Attrs: nounwind argmemonly
+declare void @llvm.lifetime.start(i64, i8* nocapture) #2
+
+declare void @_ZN5clang6format17WhitespaceManager24replaceWhitespaceInTokenERKNS0_11FormatTokenEjjN4llvm9StringRefES6_bjji(%"class.clang::format::WhitespaceManager"*, %"struct.clang::format::FormatToken"* dereferenceable(272), i32 zeroext, i32 zeroext, [2 x i64], [2 x i64], i1 zeroext, i32 zeroext, i32 zeroext, i32 signext) #3
+
+; Function Attrs: nounwind argmemonly
+declare void @llvm.lifetime.end(i64, i8* nocapture) #2
+
+attributes #9 = { nounwind }
+
+!llvm.module.flags = !{!0}
+!llvm.ident = !{!1}
+
+!0 = !{i32 1, !"PIC Level", i32 2}
+!1 = !{!"clang version 3.8.0 (trunk 248714) (llvm/trunk 248719)"}
+!2 = !{!3, !4, i64 40}
+!3 = !{!"_ZTSN5clang6format24BreakableSingleLineTokenE", !4, i64 40, !7, i64 48, !7, i64 64, !7, i64 80}
+!4 = !{!"int", !5, i64 0}
+!5 = !{!"omnipotent char", !6, i64 0}
+!6 = !{!"Simple C/C++ TBAA"}
+!7 = !{!"_ZTSN4llvm9StringRefE", !8, i64 0, !9, i64 8}
+!8 = !{!"any pointer", !5, i64 0}
+!9 = !{!"long", !5, i64 0}
+!10 = !{!7, !9, i64 8}
+!11 = !{!9, !9, i64 0}
+!12 = !{!7, !8, i64 0}
+!13 = !{!5, !5, i64 0}
+!14 = !{!15, !4, i64 200}
+!15 = !{!"_ZTSN5clang6format11FormatStyleE", !4, i64 0, !16, i64 4, !16, i64 5, !16, i64 6, !16, i64 7, !16, i64 8, !16, i64 9, !16, i64 10, !16, i64 11, !17, i64 12, !16, i64 16, !16, i64 17, !18, i64 20, !16, i64 24, !16, i64 25, !16, i64 26, !16, i64 27, !19, i64 28, !20, i64 32, !16, i64 36, !16, i64 37, !4, i64 40, !21, i64 48, !16, i64 56, !4, i64 60, !4, i64 64, !16, i64 68, !16, i64 69, !16, i64 70, !16, i64 71, !23, i64 72, !16, i64 96, !4, i64 100, !16, i64 104, !16, i64 105, !24, i64 108, !21, i64 112, !21, i64 120, !4, i64 128, !25, i64 132, !4, i64 136, !16, i64 140, !16, i64 141, !4, i64 144, !4, i64 148, !4, i64 152, !4, i64 156, !4, i64 160, !4, i64 164, !26, i64 168, !16, i64 172, !16, i64 173, !27, i64 176, !16, i64 180, !4, i64 184, !16, i64 188, !16, i64 189, !16, i64 190, !16, i64 191, !16, i64 192, !28, i64 196, !4, i64 200, !29, i64 204}
+!16 = !{!"bool", !5, i64 0}
+!17 = !{!"_ZTSN5clang6format11FormatStyle18ShortFunctionStyleE", !5, i64 0}
+!18 = !{!"_ZTSN5clang6format11FormatStyle33DefinitionReturnTypeBreakingStyleE", !5, i64 0}
+!19 = !{!"_ZTSN5clang6format11FormatStyle19BinaryOperatorStyleE", !5, i64 0}
+!20 = !{!"_ZTSN5clang6format11FormatStyle18BraceBreakingStyleE", !5, i64 0}
+!21 = !{!"_ZTSSs", !22, i64 0}
+!22 = !{!"_ZTSNSs12_Alloc_hiderE", !8, i64 0}
+!23 = !{!"_ZTSSt6vectorISsSaISsEE"}
+!24 = !{!"_ZTSN5clang6format11FormatStyle12LanguageKindE", !5, i64 0}
+!25 = !{!"_ZTSN5clang6format11FormatStyle24NamespaceIndentationKindE", !5, i64 0}
+!26 = !{!"_ZTSN5clang6format11FormatStyle21PointerAlignmentStyleE", !5, i64 0}
+!27 = !{!"_ZTSN5clang6format11FormatStyle24SpaceBeforeParensOptionsE", !5, i64 0}
+!28 = !{!"_ZTSN5clang6format11FormatStyle16LanguageStandardE", !5, i64 0}
+!29 = !{!"_ZTSN5clang6format11FormatStyle11UseTabStyleE", !5, i64 0}
+!30 = !{!31, !32, i64 24}
+!31 = !{!"_ZTSN5clang6format14BreakableTokenE", !5, i64 8, !4, i64 16, !16, i64 20, !32, i64 24, !5, i64 32}
+!32 = !{!"_ZTSN5clang6format8encoding8EncodingE", !5, i64 0}
+!33 = !{!31, !4, i64 16}
+!34 = !{!31, !16, i64 20}
+!35 = !{!36, !36, i64 0}
+!36 = !{!"vtable pointer", !6, i64 0}
+!37 = !{!38, !38, i64 0}
+!38 = !{!"short", !5, i64 0}
+!39 = !{i8 0, i8 2}
+!40 = !{i64 0, i64 8, !41, i64 8, i64 8, !11}
+!41 = !{!8, !8, i64 0}
+!42 = !{!43, !8, i64 16}
+!43 = !{!"_ZTSN4llvm15SmallVectorBaseE", !8, i64 0, !8, i64 8, !8, i64 16}
+!44 = !{!43, !8, i64 8}
+!45 = !{!43, !8, i64 0}
+!46 = !{!4, !4, i64 0}
+!47 = !{!48, !16, i64 500}
+!48 = !{!"_ZTSN5clang6format21BreakableBlockCommentE", !49, i64 40, !51, i64 320, !53, i64 408, !4, i64 496, !16, i64 500, !7, i64 504}
+!49 = !{!"_ZTSN4llvm11SmallVectorINS_9StringRefELj16EEE", !50, i64 40}
+!50 = !{!"_ZTSN4llvm18SmallVectorStorageINS_9StringRefELj16EEE", !5, i64 0}
+!51 = !{!"_ZTSN4llvm11SmallVectorIjLj16EEE", !52, i64 28}
+!52 = !{!"_ZTSN4llvm18SmallVectorStorageIjLj16EEE", !5, i64 0}
+!53 = !{!"_ZTSN4llvm11SmallVectorIiLj16EEE", !54, i64 28}
+!54 = !{!"_ZTSN4llvm18SmallVectorStorageIiLj16EEE", !5, i64 0}
+!55 = !{!48, !4, i64 496}
Modified: llvm/trunk/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll?rev=253247&r1=253246&r2=253247&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll Mon Nov 16 14:22:15 2015
@@ -47,7 +47,7 @@
;
; Without shrink-wrapping, epilogue is in the exit block.
; Epilogue code. (What we pop does not matter.)
-; DISABLE: mtlr 0
+; DISABLE: mtlr {{[0-9]+}}
; DISABLE-NEXT: blr
;
@@ -81,7 +81,7 @@ declare i32 @doSomething(i32, i32*)
;
; Prologue code.
; Make sure we save the link register
-; CHECK: mflr 0
+; CHECK: mflr {{[0-9]+}}
;
; DISABLE: cmplwi 0, 3, 0
; DISABLE: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
@@ -110,7 +110,7 @@ declare i32 @doSomething(i32, i32*)
; DISABLE: .[[EPILOG_BB]]: # %if.end
;
; Epilogue code.
-; CHECK: mtlr 0
+; CHECK: mtlr {{[0-9]+}}
; CHECK-NEXT: blr
;
; ENABLE: .[[ELSE_LABEL]]: # %if.else
@@ -155,7 +155,7 @@ declare i32 @something(...)
; CHECK-LABEL: freqSaveAndRestoreOutsideLoop2:
; Prologue code.
; Make sure we save the link register before the call
-; CHECK: mflr 0
+; CHECK: mflr {{[0-9]+}}
;
; Loop preheader
; CHECK-DAG: li [[SUM:[0-9]+]], 0
@@ -171,7 +171,7 @@ declare i32 @something(...)
;
; Next BB
; CHECK: %for.exit
-; CHECK: mtlr 0
+; CHECK: mtlr {{[0-9]+}}
; CHECK-NEXT: blr
define i32 @freqSaveAndRestoreOutsideLoop2(i32 %cond) {
entry:
@@ -208,7 +208,7 @@ for.end:
;
; Prologue code.
; Make sure we save the link register
-; CHECK: mflr 0
+; CHECK: mflr {{[0-9]+}}
;
; DISABLE: cmplwi 0, 3, 0
; DISABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
@@ -238,7 +238,7 @@ for.end:
;
; DISABLE: .[[EPILOG_BB]]: # %if.end
; Epilog code
-; CHECK: mtlr 0
+; CHECK: mtlr {{[0-9]+}}
; CHECK-NEXT: blr
;
; ENABLE: .[[ELSE_LABEL]]: # %if.else
@@ -288,7 +288,7 @@ declare void @somethingElse(...)
;
; Prologue code.
; Make sure we save the link register
-; CHECK: mflr 0
+; CHECK: mflr {{[0-9]+}}
;
; DISABLE: cmplwi 0, 3, 0
; DISABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
@@ -318,7 +318,7 @@ declare void @somethingElse(...)
; DISABLE: .[[EPILOG_BB]]: # %if.end
;
; Epilogue code.
-; CHECK: mtlr 0
+; CHECK: mtlr {{[0-9]+}}
; CHECK-NEXT: blr
;
; ENABLE: .[[ELSE_LABEL]]: # %if.else
@@ -439,7 +439,7 @@ if.end:
; ENABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
;
; Prologue code.
-; CHECK: mflr 0
+; CHECK: mflr {{[0-9]+}}
;
; DISABLE: cmplwi 0, 3, 0
; DISABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
@@ -455,7 +455,7 @@ if.end:
; CHECK: slwi 3, 3, 3
; DISABLE: b .[[EPILOGUE_BB:LBB[0-9_]+]]
;
-; ENABLE: mtlr 0
+; ENABLE: mtlr {{[0-9]+}}
; ENABLE-NEXT: blr
;
; CHECK: .[[ELSE_LABEL]]: # %if.else
@@ -492,23 +492,23 @@ declare i32 @someVariadicFunc(i32, ...)
; and it hurts the binary size.
;
; CHECK-LABEL: noreturn:
-; DISABLE: mflr 0
+; DISABLE: mflr {{[0-9]+}}
;
; CHECK: cmplwi 3, 0
; CHECK-NEXT: bne 0, .[[ABORT:LBB[0-9_]+]]
;
; CHECK: li 3, 42
;
-; DISABLE: mtlr 0
+; DISABLE: mtlr {{[0-9]+}}
;
; CHECK-NEXT: blr
;
; CHECK: .[[ABORT]]: # %if.abort
;
-; ENABLE: mflr 0
+; ENABLE: mflr {{[0-9]+}}
;
; CHECK: bl abort
-; ENABLE-NOT: mtlr 0
+; ENABLE-NOT: mtlr {{[0-9]+}}
define i32 @noreturn(i8 signext %bad_thing) {
entry:
%tobool = icmp eq i8 %bad_thing, 0
Modified: llvm/trunk/test/CodeGen/PowerPC/retaddr2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/retaddr2.ll?rev=253247&r1=253246&r2=253247&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/retaddr2.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/retaddr2.ll Mon Nov 16 14:22:15 2015
@@ -10,11 +10,11 @@ entry:
}
; CHECK-LABEL: @test1
-; CHECK: mflr 0
+; CHECK: mflr {{[0-9]+}}
; CHECK: std 0, 16(1)
; CHECK-DAG: ld 3, 64(1)
-; CHECK-DAG: ld 0, 16(1)
-; CHECK: mtlr 0
+; CHECK-DAG: ld [[SR:[0-9]+]], 16(1)
+; CHECK: mtlr [[SR]]
; CHECK: blr
; Function Attrs: nounwind readnone
Modified: llvm/trunk/test/CodeGen/PowerPC/stack-realign.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/stack-realign.ll?rev=253247&r1=253246&r2=253247&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/stack-realign.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/stack-realign.ll Mon Nov 16 14:22:15 2015
@@ -29,7 +29,7 @@ entry:
; CHECK-LABEL: @goo
-; CHECK-DAG: mflr 0
+; CHECK-DAG: mflr {{[0-9]+}}
; CHECK-DAG: clrldi [[REG:[0-9]+]], 1, 59
; CHECK-DAG: std 30, -16(1)
; CHECK-DAG: mr 30, 1
@@ -44,14 +44,14 @@ entry:
; CHECK: std 3, 48(30)
; CHECK: ld 1, 0(1)
-; CHECK-DAG: ld 0, 16(1)
+; CHECK-DAG: ld [[SR:[0-9]+]], 16(1)
; CHECK-DAG: ld 30, -16(1)
-; CHECK-DAG: mtlr 0
+; CHECK-DAG: mtlr [[SR]]
; CHECK: blr
; CHECK-FP-LABEL: @goo
-; CHECK-FP-DAG: mflr 0
+; CHECK-FP-DAG: mflr {{[0-9]+}}
; CHECK-FP-DAG: clrldi [[REG:[0-9]+]], 1, 59
; CHECK-FP-DAG: std 31, -8(1)
; CHECK-FP-DAG: std 30, -16(1)
@@ -70,14 +70,14 @@ entry:
; CHECK-FP: std 3, 48(30)
; CHECK-FP: ld 1, 0(1)
-; CHECK-FP-DAG: ld 0, 16(1)
+; CHECK-FP-DAG: ld [[SR:[0-9]+]], 16(1)
; CHECK-FP-DAG: ld 31, -8(1)
; CHECK-FP-DAG: ld 30, -16(1)
-; CHECK-FP-DAG: mtlr 0
+; CHECK-FP-DAG: mtlr [[SR]]
; CHECK-FP: blr
; CHECK-32-LABEL: @goo
-; CHECK-32-DAG: mflr 0
+; CHECK-32-DAG: mflr {{[0-9]+}}
; CHECK-32-DAG: clrlwi [[REG:[0-9]+]], 1, 27
; CHECK-32-DAG: stw 30, -8(1)
; CHECK-32-DAG: mr 30, 1
@@ -86,7 +86,7 @@ entry:
; CHECK-32: stwux 1, 1, 0
; CHECK-32-PIC-LABEL: @goo
-; CHECK-32-PIC-DAG: mflr 0
+; CHECK-32-PIC-DAG: mflr {{[0-9]+}}
; CHECK-32-PIC-DAG: clrlwi [[REG:[0-9]+]], 1, 27
; CHECK-32-PIC-DAG: stw 29, -12(1)
; CHECK-32-PIC-DAG: mr 29, 1
@@ -114,7 +114,7 @@ entry:
; CHECK-DAG: lis [[REG1:[0-9]+]], -13
; CHECK-DAG: clrldi [[REG3:[0-9]+]], 1, 59
-; CHECK-DAG: mflr 0
+; CHECK-DAG: mflr {{[0-9]+}}
; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 51808
; CHECK-DAG: std 30, -16(1)
; CHECK-DAG: mr 30, 1
@@ -130,7 +130,7 @@ entry:
; CHECK-32-DAG: lis [[REG1:[0-9]+]], -13
; CHECK-32-DAG: clrlwi [[REG3:[0-9]+]], 1, 27
-; CHECK-32-DAG: mflr 0
+; CHECK-32-DAG: mflr {{[0-9]+}}
; CHECK-32-DAG: ori [[REG2:[0-9]+]], [[REG1]], 51904
; CHECK-32-DAG: stw 30, -8(1)
; CHECK-32-DAG: mr 30, 1
@@ -144,7 +144,7 @@ entry:
; CHECK-32-PIC-DAG: lis [[REG1:[0-9]+]], -13
; CHECK-32-PIC-DAG: clrlwi [[REG3:[0-9]+]], 1, 27
-; CHECK-32-PIC-DAG: mflr 0
+; CHECK-32-PIC-DAG: mflr {{[0-9]+}}
; CHECK-32-PIC-DAG: ori [[REG2:[0-9]+]], [[REG1]], 51904
; CHECK-32-PIC-DAG: stw 29, -12(1)
; CHECK-32-PIC-DAG: mr 29, 1
@@ -174,7 +174,7 @@ entry:
; CHECK-LABEL: @loo
-; CHECK-DAG: mflr 0
+; CHECK-DAG: mflr {{[0-9]+}}
; CHECK-DAG: clrldi [[REG:[0-9]+]], 1, 59
; CHECK-DAG: std 30, -32(1)
; CHECK-DAG: mr 30, 1
@@ -190,7 +190,7 @@ entry:
; CHECK-FP-LABEL: @loo
-; CHECK-FP-DAG: mflr 0
+; CHECK-FP-DAG: mflr {{[0-9]+}}
; CHECK-FP-DAG: clrldi [[REG:[0-9]+]], 1, 59
; CHECK-FP-DAG: std 31, -24(1)
; CHECK-FP-DAG: std 30, -32(1)
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