[PATCH] D14588: [X86][SSE] Transform truncation from v8i32/v16i32 to v8i8/v16i8 into bitand and X86ISD::PACKUS operations during DAG combine.

[Cong Hou via llvm-commits]

congh added a comment.

I have attempted to combine the truncation from v16i32 to v16i8 into bitcasts and shuffles, and found that after type legalization they are still converted into extract_vector_elt and BUILD_VECTOR (shown below). In order to do the same optimization, we have to check the pattern again on them and I think the resulted code is tedious. So why not do the same thing earlier with a simpler approach?

  t0: ch = EntryToken
    t6: v4i32,ch = CopyFromReg t0, Register:v4i32 %vreg2
  t33: v16i8 = bitcast t6
    t8: v4i32,ch = CopyFromReg t0, Register:v4i32 %vreg3
  t34: v16i8 = bitcast t8
    t2: v4i32,ch = CopyFromReg t0, Register:v4i32 %vreg0
  t35: v16i8 = bitcast t2
    t4: v4i32,ch = CopyFromReg t0, Register:v4i32 %vreg1
  t36: v16i8 = bitcast t4
        t37: i8 = extract_vector_elt t35, Constant:i64<0>
        t39: i8 = extract_vector_elt t35, Constant:i64<4>
        t41: i8 = extract_vector_elt t35, Constant:i64<8>
        t43: i8 = extract_vector_elt t35, Constant:i64<12>
        t44: i8 = extract_vector_elt t36, Constant:i64<0>
        t45: i8 = extract_vector_elt t36, Constant:i64<4>
        t46: i8 = extract_vector_elt t36, Constant:i64<8>
        t47: i8 = extract_vector_elt t36, Constant:i64<12>
        t48: i8 = extract_vector_elt t33, Constant:i64<0>
        t49: i8 = extract_vector_elt t33, Constant:i64<4>
        t50: i8 = extract_vector_elt t33, Constant:i64<8>
        t51: i8 = extract_vector_elt t33, Constant:i64<12>
        t52: i8 = extract_vector_elt t34, Constant:i64<0>
        t53: i8 = extract_vector_elt t34, Constant:i64<4>
        t54: i8 = extract_vector_elt t34, Constant:i64<8>
        t55: i8 = extract_vector_elt t34, Constant:i64<12>
      t56: v16i8 = BUILD_VECTOR t37, t39, t41, t43, t44, t45, t46, t47, t48, t49, t50, t51, t52, t53, t54, t55


http://reviews.llvm.org/D14588