[PATCH] D14712: [mips][ias] Range check uimm5 operands and fix several bugs this revealed.

[Daniel Sanders via llvm-commits]

dsanders created this revision.
dsanders added a reviewer: vkalintiris.
dsanders added a subscriber: llvm-commits.
Herald added a subscriber: dsanders.

The bugs were:
* append, prepend, and balign were not tested
* balign takes a uimm2 not a uimm5.
* drotr32 was correctly implemented with a uimm5 but the tests expected
  '52' to be valid.
* li/la were implemented with a uimm5 instead of simm32. simm32 isn't
  completely correct either but I'll fix that when I get to simm32.

A notable omission are some of the shift instructions. Several of these
have been implemented using a single uimm6 instruction (rather than two
uimm5 instructions and a CodeGen-only uimm6 pseudo). These will be updated
in the uimm6 patch.

http://reviews.llvm.org/D14712

Files:
  lib/Target/Mips/AsmParser/MipsAsmParser.cpp
  lib/Target/Mips/MicroMipsInstrInfo.td
  lib/Target/Mips/Mips64InstrInfo.td
  lib/Target/Mips/MipsDSPInstrInfo.td
  lib/Target/Mips/MipsInstrInfo.td
  test/MC/Mips/cnmips/invalid.s
  test/MC/Mips/dspr2/invalid.s
  test/MC/Mips/dspr2/valid.s
  test/MC/Mips/eva/invalid.s
  test/MC/Mips/micromips-invalid.s
  test/MC/Mips/micromips/invalid.s
  test/MC/Mips/micromips32r6/invalid.s
  test/MC/Mips/micromips64r6/invalid.s
  test/MC/Mips/mips32r2/invalid.s
  test/MC/Mips/mips32r3/invalid.s
  test/MC/Mips/mips32r5/invalid.s
  test/MC/Mips/mips32r6/invalid.s
  test/MC/Mips/mips64-alu-instructions.s
  test/MC/Mips/mips64r2/invalid.s
  test/MC/Mips/mips64r3/invalid.s
  test/MC/Mips/mips64r5/invalid.s
  test/MC/Mips/mips64r6/invalid.s
  test/MC/Mips/msa/invalid.s

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