[PATCH] D14038: SelectionDAG: Match min/max if the scalar operation is legal

hfinkel@anl.gov via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 11 15:24:36 PST 2015


hfinkel added a comment.

In http://reviews.llvm.org/D14038#276589, @arsenm wrote:

> In http://reviews.llvm.org/D14038#276523, @hfinkel wrote:
>
> > Can you please explain the logic behind this change?
>
>
> This min/max pattern matching is weird because it's done in SelectionDAGBuilder. It won't match for any vector if the vector operation isn't legal. AMDGPU only has vector loads and stores, and every operation is scalar, so we only care about the legality of the scalar operations.


Okay, I think this makes sense: You have legal vector types, but few legal vector operations (only memory accesses). We do MIN/MAX matching during SDAGBuilder, and so if you don't have a vector MIN/MAX operation, but you have vector operations representing a MIN/MAX operation, and you do have a MIN/MAX on the scalar types, then it will be scalarized regardless, and you want it to be scalarized into scalar MINs/MAXs, instead of being scalarized into some collection of other operations.

Please add more-verbose commentary explaining what is going on. Also, I think the implementation needs to deal with promotions in order to work as intended in all cases. The question you're asking is: Is the operation on this type legal, or will it be legal after the operation is legalized. To do this, you need to call getOperationAction, and if you get back Promote, call it again with the promoted-to type. You can get the type by calling getTypeToPromoteTo.


http://reviews.llvm.org/D14038





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