[PATCH] D14505: [AArch64] add overrides for isCheapToSpeculateCttz() and isCheapToSpeculateCtlz()

[Sanjay Patel via llvm-commits]

spatel created this revision.
spatel added reviewers: t.p.northover, rengolin, chatur01.
spatel added a subscriber: llvm-commits.
Herald added subscribers: rengolin, aemerson.

AArch64 is using the default TLI cost settings (expensive) for count-leading/trailing-zeros. I think this should be considered a cheap operation (and therefore fair game for speculation) for any AArch64 implementation.

The net result of allowing this speculation for the regression tests in this patch is that we get this code:
  ctlz:
    clz  w0, w0
    ret
  
  cttz:
    rbit  w8, w0
    clz  w0, w8
    ret

Instead of:
  ctlz:
    cbz  w0, .LBB0_2
    clz  w0, w0
    ret
  .LBB0_2:
    orr  w0, wzr, #0x20
    ret
  
  cttz:
    cbz  w0, .LBB1_2
    rbit  w8, w0
    clz  w0, w8
    ret
  .LBB1_2:
    orr  w0, wzr, #0x20
    ret

See D14469 for the larger motivation.

http://reviews.llvm.org/D14505

Files:
  lib/Target/AArch64/AArch64ISelLowering.h
  test/Transforms/SimplifyCFG/AArch64/cttz-ctlz.ll

Index: test/Transforms/SimplifyCFG/AArch64/cttz-ctlz.ll
===================================================================
--- test/Transforms/SimplifyCFG/AArch64/cttz-ctlz.ll
+++ test/Transforms/SimplifyCFG/AArch64/cttz-ctlz.ll
@@ -0,0 +1,43 @@
+; RUN: opt -S -simplifycfg -mtriple=aarch64 < %s | FileCheck %s
+
+define i32 @ctlz(i32 %A) {
+; CHECK-LABEL: @ctlz(
+; CHECK: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
+; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
+; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
+; CHECK-NEXT: ret i32 [[SEL]]
+entry:
+  %tobool = icmp eq i32 %A, 0
+  br i1 %tobool, label %cond.end, label %cond.true
+
+cond.true:
+  %0 = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
+  br label %cond.end
+
+cond.end:
+  %cond = phi i32 [ %0, %cond.true ], [ 32, %entry ]
+  ret i32 %cond
+}
+
+define i32 @cttz(i32 %A) {
+; CHECK-LABEL: @cttz(
+; CHECK: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
+; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
+; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
+; CHECK-NEXT: ret i32 [[SEL]]
+entry:
+  %tobool = icmp eq i32 %A, 0
+  br i1 %tobool, label %cond.end, label %cond.true
+
+cond.true:
+  %0 = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
+  br label %cond.end
+
+cond.end:
+  %cond = phi i32 [ %0, %cond.true ], [ 32, %entry ]
+  ret i32 %cond
+}
+
+declare i32 @llvm.ctlz.i32(i32, i1)
+declare i32 @llvm.cttz.i32(i32, i1)
+
Index: lib/Target/AArch64/AArch64ISelLowering.h
===================================================================
--- lib/Target/AArch64/AArch64ISelLowering.h
+++ lib/Target/AArch64/AArch64ISelLowering.h
@@ -381,6 +381,14 @@
     return AArch64::X1;
   }
 
+  bool isCheapToSpeculateCttz() const override {
+    return true;
+  }
+
+  bool isCheapToSpeculateCtlz() const override {
+    return true;
+  }
+
 private:
   bool isExtFreeImpl(const Instruction *Ext) const override;
 


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