[SelectionDAGBuilder] incorrect reg class assigned after isel

Jonas Paulsson via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 2 01:20:40 PST 2015


Hello,

I think I have found the fix for this problem, see attached patch.

OK to commit?

/Jonas


On 2015-10-23 15:11, Jonas Paulsson wrote:
> Hi,
>
> I have a problem with a small test-case that needs to return an fp128 
> by storing it to memory, and would appreciate any help.
>
> LowerReturn() builds an ISD::store, which later gets morphed to 
> SystemZ::STX. The register class for this opcode is a sub-set of the 
> i64 reg-class - without R0, which is not used as an address register. 
> The reg class does not get constrained, so it remains GR64Bit, instead 
> of ADDR64Bit, which is wrong.
>
> I am not sure what the proper handling is:
>
> Adding the SystemZ::ADDR64BitRegClass in TargetLowering did not seem 
> to help.
>
> I thought somewhere MRI->constrainRegClass() was supposed to be called 
> at any register operand that have a too big RC (as in this case), or 
> an extra COPY into the smaller RC should be emitted. To me, this 
> should be done by the method that morphs the node, or at a later point 
> during instruction emission.
>
> /Jonas
>

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