[llvm] r251566 - [PowerPC] Cleanly reject asm crbit constraint with -crbits

Hal Finkel via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 28 15:25:52 PDT 2015


Author: hfinkel
Date: Wed Oct 28 17:25:52 2015
New Revision: 251566

URL: http://llvm.org/viewvc/llvm-project?rev=251566&view=rev
Log:
[PowerPC] Cleanly reject asm crbit constraint with -crbits

When crbits are disabled, cleanly reject the constraint (return the register
class only to cause an assert later).

Added:
    llvm/trunk/test/CodeGen/PowerPC/crbit-asm-disabled.ll
Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=251566&r1=251565&r2=251566&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Wed Oct 28 17:25:52 2015
@@ -10927,7 +10927,8 @@ PPCTargetLowering::getRegForInlineAsmCon
     case 'y':   // crrc
       return std::make_pair(0U, &PPC::CRRCRegClass);
     }
-  } else if (Constraint == "wc") { // an individual CR bit.
+  } else if (Constraint == "wc" && Subtarget.useCRBits()) {
+    // An individual CR bit.
     return std::make_pair(0U, &PPC::CRBITRCRegClass);
   } else if (Constraint == "wa" || Constraint == "wd" ||
              Constraint == "wf") {

Added: llvm/trunk/test/CodeGen/PowerPC/crbit-asm-disabled.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/crbit-asm-disabled.ll?rev=251566&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/crbit-asm-disabled.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/crbit-asm-disabled.ll Wed Oct 28 17:25:52 2015
@@ -0,0 +1,16 @@
+; RUN: not llc -mcpu=pwr7 -o /dev/null %s 2>&1 | FileCheck %s
+target datalayout = "E-m:e-i64:64-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+define zeroext i1 @testi1(i1 zeroext %b1, i1 zeroext %b2) #0 {
+entry:
+  %0 = tail call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i1 %b1, i1 %b2) #0
+  %1 = and i8 %0, 1
+  %tobool3 = icmp ne i8 %1, 0
+  ret i1 %tobool3
+
+; CHECK: error: couldn't allocate output register for constraint 'wc'
+}
+
+attributes #0 = { nounwind "target-features"="-crbits" }
+




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