[PATCH] D13532: [CGP] widen switch condition and case constants to target's register width

hfinkel@anl.gov via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 27 18:10:33 PDT 2015


hfinkel added a comment.

In http://reviews.llvm.org/D13532#262174, @spatel wrote:

> After:
>
>   BB#0:        
>    rlwinm 4, 3, 0, 16, 31   <--- mask/extend to 32-bit and then use that for comparisons
>    cmpwi	 4, 999
>
> ...


Someone amusingly, even though you can't tell from this test case, this is somewhat suboptimal. Consider this:

  $ cat /tmp/foo.c 
  short foo(short a) { return a; }
  
  $ clang -O3 -S -emit-llvm -o - /tmp/foo.c 
  target datalayout = "E-m:e-i64:64-n32:64"
  target triple = "powerpc64-unknown-linux-gnu"
  
  define signext i16 @foo(i16 signext %a) #0 {
  entry:
    ret i16 %a
  }

and, notice here that the argument has the 'signext' attribute. This argument will be carried in an i32 register, but sign extended from i16. Thus, at least in theory, if we sign extended in this transformation, instead of zero-extended, we'd not actually need any extension instruction at all.

Can you think of any way to have it pick sext instead of zext when we know the input is really sign extended anyway? This might only apply to function arguments?


================
Comment at: lib/CodeGen/CodeGenPrepare.cpp:4016
@@ +4015,3 @@
+  IntegerType *NewType = Type::getIntNTy(Context, RegWidth);
+  CastInst *Zext = CastInst::CreateZExtOrBitCast(Cond, NewType);
+  Zext->insertBefore(SI);
----------------
We don't need the 'OrBitCast' here, do we?


http://reviews.llvm.org/D13532





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