[llvm] r251038 - AArch64: Disable the latency heuristic

[Matthias Braun via llvm-commits]

Author: matze
Date: Thu Oct 22 13:07:38 2015
New Revision: 251038

URL: http://llvm.org/viewvc/llvm-project?rev=251038&view=rev
Log:
AArch64: Disable the latency heuristic

It turned out not to improve any of our benchmarks but occasionally led
to increased register pressure and spilling.

Only enabling for the Cyclone CPU as the results on the cortex CPUs
give mixed results.

Differential Revision: http://reviews.llvm.org/D13708

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp?rev=251038&r1=251037&r2=251038&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp Thu Oct 22 13:07:38 2015
@@ -114,6 +114,11 @@ void AArch64Subtarget::overrideSchedPoli
   // bi-directional scheduling. 253.perlbmk.
   Policy.OnlyTopDown = false;
   Policy.OnlyBottomUp = false;
+  // Enabling or Disabling the latency heuristic is a close call: It seems to
+  // help nearly no benchmark on out-of-order architectures, on the other hand
+  // it regresses register pressure on a few benchmarking.
+  if (isCyclone())
+    Policy.DisableLatencyHeuristic = true;
 }
 
 bool AArch64Subtarget::enableEarlyIfConversion() const {