[llvm] r250697 - Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions
Asiri Rathnayake via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 19 04:44:24 PDT 2015
Author: asiri
Date: Mon Oct 19 06:44:24 2015
New Revision: 250697
URL: http://llvm.org/viewvc/llvm-project?rev=250697&view=rev
Log:
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions
The mapping of these two intrinsics in ARMInstrInfo.td had a small
omission which lead to their operands not being validated/transformed
before being lowered into usat and ssat instructions. This can cause
incorrect instructions to be emitted.
I've also added tests for the remaining two saturating arithmatic
intrinsics @llvm.arm.qadd and @llvm.arm.qsub as they are missing
codegen tests.
Added:
llvm/trunk/test/CodeGen/ARM/sat-arith.ll
llvm/trunk/test/CodeGen/ARM/ssat-lower.ll
llvm/trunk/test/CodeGen/ARM/ssat-upper.ll
llvm/trunk/test/CodeGen/ARM/usat-lower.ll
llvm/trunk/test/CodeGen/ARM/usat-upper.ll
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=250697&r1=250696&r2=250697&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Oct 19 06:44:24 2015
@@ -3678,10 +3678,10 @@ def USAT16 : AI<(outs GPRnopc:$Rd),
let Inst{3-0} = Rn;
}
-def : ARMV6Pat<(int_arm_ssat GPRnopc:$a, imm:$pos),
- (SSAT imm:$pos, GPRnopc:$a, 0)>;
-def : ARMV6Pat<(int_arm_usat GPRnopc:$a, imm:$pos),
- (USAT imm:$pos, GPRnopc:$a, 0)>;
+def : ARMV6Pat<(int_arm_ssat GPRnopc:$a, imm1_32:$pos),
+ (SSAT imm1_32:$pos, GPRnopc:$a, 0)>;
+def : ARMV6Pat<(int_arm_usat GPRnopc:$a, imm0_31:$pos),
+ (USAT imm0_31:$pos, GPRnopc:$a, 0)>;
//===----------------------------------------------------------------------===//
// Bitwise Instructions.
Added: llvm/trunk/test/CodeGen/ARM/sat-arith.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/sat-arith.ll?rev=250697&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/sat-arith.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/sat-arith.ll Mon Oct 19 06:44:24 2015
@@ -0,0 +1,60 @@
+; RUN: llc -O1 -mtriple=armv6-none-none-eabi %s -o - | FileCheck %s
+
+; CHECK-LABEL: qadd
+define i32 @qadd() nounwind {
+; CHECK: mov [[R0:.*]], #8
+; CHECK: mov [[R1:.*]], #128
+; CHECK: qadd [[R0]], [[R1]], [[R0]]
+ %tmp = call i32 @llvm.arm.qadd(i32 128, i32 8)
+ ret i32 %tmp
+}
+
+; CHECK-LABEL: qsub
+define i32 @qsub() nounwind {
+; CHECK: mov [[R0:.*]], #8
+; CHECK: mov [[R1:.*]], #128
+; CHECK: qsub [[R0]], [[R1]], [[R0]]
+ %tmp = call i32 @llvm.arm.qsub(i32 128, i32 8)
+ ret i32 %tmp
+}
+
+; upper-bound of the immediate argument
+; CHECK-LABEL: ssat1
+define i32 @ssat1() nounwind {
+; CHECK: mov [[R0:.*]], #128
+; CHECK: ssat [[R1:.*]], #32, [[R0]]
+ %tmp = call i32 @llvm.arm.ssat(i32 128, i32 32)
+ ret i32 %tmp
+}
+
+; lower-bound of the immediate argument
+; CHECK-LABEL: ssat2
+define i32 @ssat2() nounwind {
+; CHECK: mov [[R0:.*]], #128
+; CHECK: ssat [[R1:.*]], #1, [[R0]]
+ %tmp = call i32 @llvm.arm.ssat(i32 128, i32 1)
+ ret i32 %tmp
+}
+
+; upper-bound of the immediate argument
+; CHECK-LABEL: usat1
+define i32 @usat1() nounwind {
+; CHECK: mov [[R0:.*]], #128
+; CHECK: usat [[R1:.*]], #31, [[R0]]
+ %tmp = call i32 @llvm.arm.usat(i32 128, i32 31)
+ ret i32 %tmp
+}
+
+; lower-bound of the immediate argument
+; CHECK-LABEL: usat2
+define i32 @usat2() nounwind {
+; CHECK: mov [[R0:.*]], #128
+; CHECK: usat [[R1:.*]], #0, [[R0]]
+ %tmp = call i32 @llvm.arm.usat(i32 128, i32 0)
+ ret i32 %tmp
+}
+
+declare i32 @llvm.arm.qadd(i32, i32) nounwind
+declare i32 @llvm.arm.qsub(i32, i32) nounwind
+declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone
+declare i32 @llvm.arm.usat(i32, i32) nounwind readnone
Added: llvm/trunk/test/CodeGen/ARM/ssat-lower.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ssat-lower.ll?rev=250697&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/ssat-lower.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/ssat-lower.ll Mon Oct 19 06:44:24 2015
@@ -0,0 +1,10 @@
+; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
+
+; immediate argument < lower-bound
+; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat
+define i32 @ssat1() nounwind {
+ %tmp = call i32 @llvm.arm.ssat(i32 128, i32 0)
+ ret i32 %tmp
+}
+
+declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone
Added: llvm/trunk/test/CodeGen/ARM/ssat-upper.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ssat-upper.ll?rev=250697&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/ssat-upper.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/ssat-upper.ll Mon Oct 19 06:44:24 2015
@@ -0,0 +1,10 @@
+; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
+
+; immediate argument > upper-bound
+; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat
+define i32 @ssat1() nounwind {
+ %tmp = call i32 @llvm.arm.ssat(i32 128, i32 33)
+ ret i32 %tmp
+}
+
+declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone
Added: llvm/trunk/test/CodeGen/ARM/usat-lower.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/usat-lower.ll?rev=250697&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/usat-lower.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/usat-lower.ll Mon Oct 19 06:44:24 2015
@@ -0,0 +1,10 @@
+; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
+
+; immediate argument < lower-bound
+; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat
+define i32 @usat1() nounwind {
+ %tmp = call i32 @llvm.arm.usat(i32 128, i32 -1)
+ ret i32 %tmp
+}
+
+declare i32 @llvm.arm.usat(i32, i32) nounwind readnone
Added: llvm/trunk/test/CodeGen/ARM/usat-upper.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/usat-upper.ll?rev=250697&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/usat-upper.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/usat-upper.ll Mon Oct 19 06:44:24 2015
@@ -0,0 +1,10 @@
+; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
+
+; immediate argument > upper-bound
+; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat
+define i32 @usat1() nounwind {
+ %tmp = call i32 @llvm.arm.usat(i32 128, i32 32)
+ ret i32 %tmp
+}
+
+declare i32 @llvm.arm.usat(i32, i32) nounwind readnone
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