[llvm] r250596 - RegisterPressure: allocatable physreg uses are always kills
Michel Dänzer via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 18 23:44:58 PDT 2015
Hi Matthias,
On 17.10.2015 09:46, Matthias Braun via llvm-commits wrote:
> Author: matze
> Date: Fri Oct 16 19:46:57 2015
> New Revision: 250596
>
> URL: http://llvm.org/viewvc/llvm-project?rev=250596&view=rev
> Log:
> RegisterPressure: allocatable physreg uses are always kills
>
> This property was already used in the code path when no liveness
> intervals are present. Unfortunately the code path that uses liveness
> intervals tried to query a cached live interval for an allocatable
> physreg, those are usually not computed so a conservative default was
> used.
>
> This doesn't affect any of the lit testcases. This is a foreclosure to
> upcoming changes which should be NFC but without this patch this tidbit
> wouldn't be NFC.
This change caused almost 20 test cases of the piglit gpu (OpenGL)
profile to fail with an assertion failure using the AMDGPU backend via
the Mesa radeonsi driver:
shader_runner: /home/daenzer/src/llvm-git/llvm/lib/CodeGen/RegisterPressure.cpp:38: void decreaseSetPressure(std::vector<unsigned int>&, llvm::PSetIterator): Assertion `CurrSetPressure[*PSetI] >= Weight && "register pressure underflow"' failed.
See an example backtrace below. I'm attaching the corresponding IR.
#0 0x00007ffff5608107 in __GI_raise (sig=sig at entry=6) at ../nptl/sysdeps/unix/sysv/linux/raise.c:56
#1 0x00007ffff56094e8 in __GI_abort () at abort.c:89
#2 0x00007ffff5601226 in __assert_fail_base (fmt=0x7ffff5737d08 "%s%s%s:%u: %s%sAssertion `%s' failed.\n%n", assertion=assertion at entry=0x7fffeec74100 "CurrSetPressure[*PSetI] >= Weight && \"register pressure underflow\"",
file=file at entry=0x7fffeec740b8 "/home/daenzer/src/llvm-git/llvm/lib/CodeGen/RegisterPressure.cpp", line=line at entry=38,
function=function at entry=0x7fffeec760e0 <decreaseSetPressure(std::vector<unsigned int, std::allocator<unsigned int> >&, llvm::PSetIterator)::__PRETTY_FUNCTION__> "void decreaseSetPressure(std::vector<unsigned int>&, llvm::PSetIterator)") at assert.c:92
#3 0x00007ffff56012d2 in __GI___assert_fail (assertion=assertion at entry=0x7fffeec74100 "CurrSetPressure[*PSetI] >= Weight && \"register pressure underflow\"", file=file at entry=0x7fffeec740b8 "/home/daenzer/src/llvm-git/llvm/lib/CodeGen/RegisterPressure.cpp",
line=line at entry=38, function=function at entry=0x7fffeec760e0 <decreaseSetPressure(std::vector<unsigned int, std::allocator<unsigned int> >&, llvm::PSetIterator)::__PRETTY_FUNCTION__> "void decreaseSetPressure(std::vector<unsigned int>&, llvm::PSetIterator)")
at assert.c:101
#4 0x00007fffee1dcae9 in decreaseSetPressure (PSetI=..., CurrSetPressure=std::vector of length 26, capacity 26 = {...}) at /home/daenzer/src/llvm-git/llvm/lib/CodeGen/RegisterPressure.cpp:38
#5 llvm::RegPressureTracker::decreaseRegPressure (this=0xcf6f98, RegUnits=...) at /home/daenzer/src/llvm-git/llvm/lib/CodeGen/RegisterPressure.cpp:108
#6 0x00007fffee1e1a34 in llvm::RegPressureTracker::bumpDownwardPressure (this=this at entry=0xcf6f98, MI=MI at entry=0xcbf0f0) at /home/daenzer/src/llvm-git/llvm/lib/CodeGen/RegisterPressure.cpp:943
#7 0x00007fffee1e2088 in llvm::RegPressureTracker::getMaxDownwardPressureDelta (this=0xcf6f98, MI=0xcbf0f0, Delta=..., CriticalPSets=..., MaxPressureLimit=...) at /home/daenzer/src/llvm-git/llvm/lib/CodeGen/RegisterPressure.cpp:973
#8 0x00007fffee15de22 in llvm::GenericScheduler::tryCandidate (this=this at entry=0xcf5fc0, Cand=..., TryCand=..., Zone=..., RPTracker=..., TempTracker=...) at /home/daenzer/src/llvm-git/llvm/lib/CodeGen/MachineScheduler.cpp:2628
#9 0x00007fffee15e213 in llvm::GenericScheduler::pickNodeFromQueue (this=this at entry=0xcf5fc0, Zone=..., RPTracker=..., Cand=...) at /home/daenzer/src/llvm-git/llvm/lib/CodeGen/MachineScheduler.cpp:2763
#10 0x00007fffee160035 in llvm::GenericScheduler::pickNodeBidirectional (this=this at entry=0xcf5fc0, IsTopNode=@0x7fffffff53bf: true) at /home/daenzer/src/llvm-git/llvm/lib/CodeGen/MachineScheduler.cpp:2818
#11 0x00007fffee1603a1 in llvm::GenericScheduler::pickNode (this=0xcf5fc0, IsTopNode=@0x7fffffff53bf: true) at /home/daenzer/src/llvm-git/llvm/lib/CodeGen/MachineScheduler.cpp:2867
#12 0x00007fffee162c90 in llvm::ScheduleDAGMILive::schedule (this=0xcf6430) at /home/daenzer/src/llvm-git/llvm/lib/CodeGen/MachineScheduler.cpp:1049
#13 0x00007fffee156081 in (anonymous namespace)::MachineSchedulerBase::scheduleRegions (Scheduler=..., this=<optimized out>) at /home/daenzer/src/llvm-git/llvm/lib/CodeGen/MachineScheduler.cpp:481
#14 0x00007fffee162168 in (anonymous namespace)::MachineScheduler::runOnMachineFunction (this=0xc924c0, mf=...) at /home/daenzer/src/llvm-git/llvm/lib/CodeGen/MachineScheduler.cpp:343
#15 0x00007fffedd8f4d9 in llvm::FPPassManager::runOnFunction (this=0xc62fb0, F=...) at /home/daenzer/src/llvm-git/llvm/lib/IR/LegacyPassManager.cpp:1521
#16 0x00007fffedd8f88b in llvm::FPPassManager::runOnModule (this=0xc62fb0, M=...) at /home/daenzer/src/llvm-git/llvm/lib/IR/LegacyPassManager.cpp:1542
#17 0x00007fffedd8f114 in (anonymous namespace)::MPPassManager::runOnModule (M=..., this=<optimized out>) at /home/daenzer/src/llvm-git/llvm/lib/IR/LegacyPassManager.cpp:1598
#18 llvm::legacy::PassManagerImpl::run (this=0xc67a20, M=...) at /home/daenzer/src/llvm-git/llvm/lib/IR/LegacyPassManager.cpp:1701
#19 0x00007fffedd8f2ee in llvm::legacy::PassManager::run (this=this at entry=0x7fffffff5720, M=...) at /home/daenzer/src/llvm-git/llvm/lib/IR/LegacyPassManager.cpp:1732
#20 0x00007fffede7bc01 in LLVMTargetMachineEmit (T=T at entry=0x79aab0, M=M at entry=0x826ea0, OS=..., codegen=codegen at entry=LLVMObjectFile, ErrorMessage=ErrorMessage at entry=0x7fffffff5a00) at /home/daenzer/src/llvm-git/llvm/lib/Target/TargetMachineC.cpp:216
#21 0x00007fffede7bf8c in LLVMTargetMachineEmitToMemoryBuffer (T=T at entry=0x79aab0, M=M at entry=0x826ea0, codegen=codegen at entry=LLVMObjectFile, ErrorMessage=ErrorMessage at entry=0x7fffffff5a00, OutMemBuf=OutMemBuf at entry=0x7fffffff5a08)
at /home/daenzer/src/llvm-git/llvm/lib/Target/TargetMachineC.cpp:240
#22 0x00007ffff065259f in radeon_llvm_compile (M=M at entry=0x826ea0, binary=binary at entry=0x805210, gpu_family=<optimized out>, dump_ir=dump_ir at entry=false, dump_asm=dump_asm at entry=false, tm=tm at entry=0x79aab0)
at ../../../../../src/gallium/drivers/radeon/radeon_llvm_emit.c:184
#23 0x00007ffff059a41e in si_compile_llvm (sscreen=sscreen at entry=0x691220, shader=shader at entry=0x8051e0, tm=tm at entry=0x79aab0, mod=0x826ea0) at ../../../../../src/gallium/drivers/radeonsi/si_shader.c:3916
#24 0x00007ffff059b170 in si_shader_create (sscreen=0x691220, tm=0x79aab0, shader=shader at entry=0x8051e0) at ../../../../../src/gallium/drivers/radeonsi/si_shader.c:4220
#25 0x00007ffff05a8999 in si_shader_select (ctx=ctx at entry=0x63e540, sel=0x8058e0) at ../../../../../src/gallium/drivers/radeonsi/si_state_shaders.c:634
#26 0x00007ffff05a9a12 in si_update_shaders (sctx=sctx at entry=0x63e540) at ../../../../../src/gallium/drivers/radeonsi/si_state_shaders.c:1517
#27 0x00007ffff05a549e in si_draw_vbo (ctx=0x63e540, info=0x7fffffffdf90) at ../../../../../src/gallium/drivers/radeonsi/si_state_draw.c:762
#28 0x00007ffff036b8c1 in u_vbuf_draw_vbo (mgr=0x808a00, info=<optimized out>) at ../../../../src/gallium/auxiliary/util/u_vbuf.c:1294
#29 0x00007ffff011765b in st_draw_vbo (ctx=0x7a5880, prims=<optimized out>, nr_prims=<optimized out>, ib=0x0, index_bounds_valid=<optimized out>, min_index=0, max_index=3, tfb_vertcount=0x0, stream=0, indirect=0x0)
at ../../../src/mesa/state_tracker/st_draw.c:291
#30 0x00007ffff00daf3a in vbo_draw_arrays (ctx=0x7a5880, mode=5, start=0, count=4, numInstances=1, baseInstance=0) at ../../../src/mesa/vbo/vbo_exec_array.c:645
#31 0x00007ffff7ab8b8b in stub_glDrawArrays (mode=5, first=0, count=4) at tests/util/piglit-dispatch-gen.c:11317
#32 0x00007ffff7b20146 in piglit_draw_rect_from_arrays (verts=0x7fffffffe340, tex=0x0, use_patches=false) at tests/util/piglit-util-gl.c:709
#33 0x00007ffff7b20549 in piglit_draw_rect_custom (x=10, y=10, w=10, h=10, use_patches=false) at tests/util/piglit-util-gl.c:822
#34 0x00007ffff7b20595 in piglit_draw_rect (x=10, y=10, w=10, h=10) at tests/util/piglit-util-gl.c:831
#35 0x000000000040afdd in piglit_display () at tests/shaders/shader_runner.c:2700
#36 0x00007ffff7b445a4 in run_test (gl_fw=0x625c20, argc=2, argv=0x7fffffffe718) at tests/util/piglit-framework-gl/piglit_winsys_framework.c:79
#37 0x00007ffff7b293b1 in piglit_gl_test_run (argc=2, argv=0x7fffffffe718, config=0x7fffffffe5e0) at tests/util/piglit-framework-gl.c:199
#38 0x0000000000405651 in main (argc=2, argv=0x7fffffffe718) at tests/shaders/shader_runner.c:54
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
-------------- next part --------------
; ModuleID = 'tgsi'
define void @main([9 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [17 x <4 x i32>] addrspace(2)* byval, [34 x <8 x i32>] addrspace(2)* byval, float inreg, i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, i32, float, float) #0 {
main_body:
%23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
%24 = fcmp ogt float %23, -2.000000e+04
%25 = select i1 %24, float 0.000000e+00, float 1.000000e+00
%26 = select i1 %24, float 1.000000e+00, float 0.000000e+00
%27 = call i32 @llvm.SI.packf16(float %25, float %26)
%28 = bitcast i32 %27 to float
%29 = call i32 @llvm.SI.packf16(float 0.000000e+00, float 1.000000e+00)
%30 = bitcast i32 %29 to float
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %28, float %30, float %28, float %30)
ret void
}
; Function Attrs: nounwind readnone
declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
; Function Attrs: nounwind readnone
declare i32 @llvm.SI.packf16(float, float) #1
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
attributes #0 = { "ShaderType"="0" "enable-no-nans-fp-math"="true" }
attributes #1 = { nounwind readnone }
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