[PATCH] D13672: [ARM CodeGen] @llvm.debugtrap call may be removed when restoring callee saved registers

Oleg Ranevskyy via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 15 15:01:00 PDT 2015


iid_iunknown updated this revision to Diff 37522.
iid_iunknown added a comment.

The test updated according to the remarks from Renato to make the checks clearer.


Repository:
  rL LLVM

http://reviews.llvm.org/D13672

Files:
  lib/Target/ARM/ARMFrameLowering.cpp
  test/CodeGen/ARM/debugtrap.ll

Index: test/CodeGen/ARM/debugtrap.ll
===================================================================
--- test/CodeGen/ARM/debugtrap.ll
+++ test/CodeGen/ARM/debugtrap.ll
@@ -0,0 +1,17 @@
+; This test ensures the @llvm.debugtrap() call is not removed when generating
+; the 'pop' instruction to restore the callee saved registers on ARM.
+
+; RUN: llc < %s -mtriple=armv7 -O0 -filetype=asm | FileCheck %s 
+
+declare void @llvm.debugtrap() nounwind
+declare void @foo() nounwind
+
+define void @test() nounwind {
+entry:
+  ; CHECK: bl foo
+  ; CHECK-NEXT: pop
+  ; CHECK-NEXT: trap
+  call void @foo()
+  call void @llvm.debugtrap()
+  ret void
+}
Index: lib/Target/ARM/ARMFrameLowering.cpp
===================================================================
--- lib/Target/ARM/ARMFrameLowering.cpp
+++ lib/Target/ARM/ARMFrameLowering.cpp
@@ -968,12 +968,16 @@
   DebugLoc DL;
   bool isTailCall = false;
   bool isInterrupt = false;
+  bool isTrap = false;
   if (MBB.end() != MI) {
     DL = MI->getDebugLoc();
     unsigned RetOpcode = MI->getOpcode();
     isTailCall = (RetOpcode == ARM::TCRETURNdi || RetOpcode == ARM::TCRETURNri);
     isInterrupt =
         RetOpcode == ARM::SUBS_PC_LR || RetOpcode == ARM::t2SUBS_PC_LR;
+    isTrap =
+        RetOpcode == ARM::TRAP || RetOpcode == ARM::TRAPNaCl ||
+        RetOpcode == ARM::tTRAP;
   }
 
   SmallVector<unsigned, 4> Regs;
@@ -990,7 +994,7 @@
         continue;
 
       if (Reg == ARM::LR && !isTailCall && !isVarArg && !isInterrupt &&
-          STI.hasV5TOps()) {
+          !isTrap && STI.hasV5TOps()) {
         if (MBB.succ_empty()) {
           Reg = ARM::PC;
           DeleteRet = true;


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