[lld] r250421 - Centralize the handling of r_addend. NFC.

Rafael Espindola via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 15 08:52:12 PDT 2015


Author: rafael
Date: Thu Oct 15 10:52:12 2015
New Revision: 250421

URL: http://llvm.org/viewvc/llvm-project?rev=250421&view=rev
Log:
Centralize the handling of r_addend. NFC.

When a relocation points to a SHF_MERGE section, the addend has special meaning.
It should be used to find what in the section the relocation points to. It
should not be added to the output position.

Centralizing it means that the above rule will be implemented once, not once
per target.

Modified:
    lld/trunk/ELF/InputSection.cpp
    lld/trunk/ELF/InputSection.h
    lld/trunk/ELF/Target.cpp

Modified: lld/trunk/ELF/InputSection.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/InputSection.cpp?rev=250421&r1=250420&r2=250421&view=diff
==============================================================================
--- lld/trunk/ELF/InputSection.cpp (original)
+++ lld/trunk/ELF/InputSection.cpp Thu Oct 15 10:52:12 2015
@@ -26,6 +26,23 @@ InputSection<ELFT>::InputSection(ObjectF
     : File(F), Header(Header) {}
 
 template <class ELFT>
+void InputSection<ELFT>::relocateOne(uint8_t *Buf, uint8_t *BufEnd,
+                                     const Elf_Rel &Rel, uint32_t Type,
+                                     uintX_t BaseAddr, uintX_t SymVA) {
+  Target->relocateOne(Buf, BufEnd, reinterpret_cast<const void *>(&Rel), Type,
+                      BaseAddr, SymVA);
+}
+
+template <class ELFT>
+void InputSection<ELFT>::relocateOne(uint8_t *Buf, uint8_t *BufEnd,
+                                     const Elf_Rela &Rel, uint32_t Type,
+                                     uintX_t BaseAddr, uintX_t SymVA) {
+  SymVA += Rel.r_addend;
+  Target->relocateOne(Buf, BufEnd, reinterpret_cast<const void *>(&Rel), Type,
+                      BaseAddr, SymVA);
+}
+
+template <class ELFT>
 template <bool isRela>
 void InputSection<ELFT>::relocate(
     uint8_t *Buf, uint8_t *BufEnd,
@@ -42,8 +59,7 @@ void InputSection<ELFT>::relocate(
     const Elf_Shdr *SymTab = File.getSymbolTable();
     if (SymIndex < SymTab->sh_info) {
       uintX_t SymVA = getLocalRelTarget(File, RI);
-      Target->relocateOne(Buf, BufEnd, reinterpret_cast<const void *>(&RI),
-                          Type, BaseAddr, SymVA);
+      relocateOne(Buf, BufEnd, RI, Type, BaseAddr, SymVA);
       continue;
     }
 
@@ -61,8 +77,7 @@ void InputSection<ELFT>::relocate(
     } else if (isa<SharedSymbol<ELFT>>(Body)) {
       continue;
     }
-    Target->relocateOne(Buf, BufEnd, reinterpret_cast<const void *>(&RI), Type,
-                        BaseAddr, SymVA);
+    relocateOne(Buf, BufEnd, RI, Type, BaseAddr, SymVA);
   }
 }
 

Modified: lld/trunk/ELF/InputSection.h
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/InputSection.h?rev=250421&r1=250420&r2=250421&view=diff
==============================================================================
--- lld/trunk/ELF/InputSection.h (original)
+++ lld/trunk/ELF/InputSection.h Thu Oct 15 10:52:12 2015
@@ -60,6 +60,12 @@ public:
   static InputSection<ELFT> Discarded;
 
 private:
+  static void relocateOne(uint8_t *Buf, uint8_t *BufEnd, const Elf_Rel &Rel,
+                          uint32_t Type, uintX_t BaseAddr, uintX_t SymVA);
+
+  static void relocateOne(uint8_t *Buf, uint8_t *BufEnd, const Elf_Rela &Rel,
+                          uint32_t Type, uintX_t BaseAddr, uintX_t SymVA);
+
   template <bool isRela>
   void relocate(uint8_t *Buf, uint8_t *BufEnd,
                 llvm::iterator_range<

Modified: lld/trunk/ELF/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.cpp?rev=250421&r1=250420&r2=250421&view=diff
==============================================================================
--- lld/trunk/ELF/Target.cpp (original)
+++ lld/trunk/ELF/Target.cpp Thu Oct 15 10:52:12 2015
@@ -294,14 +294,14 @@ void X86_64TargetInfo::relocateOne(uint8
   switch (Type) {
   case R_X86_64_PC32:
   case R_X86_64_GOTPCREL:
-    write32le(Loc, SymVA + Rel.r_addend - (BaseAddr + Offset));
+    write32le(Loc, SymVA - (BaseAddr + Offset));
     break;
   case R_X86_64_64:
-    write64le(Loc, SymVA + Rel.r_addend);
+    write64le(Loc, SymVA);
     break;
   case R_X86_64_32: {
   case R_X86_64_32S:
-    uint64_t VA = SymVA + Rel.r_addend;
+    uint64_t VA = SymVA;
     if (Type == R_X86_64_32 && !isUInt<32>(VA))
       error("R_X86_64_32 out of range");
     else if (!isInt<32>(VA))
@@ -441,7 +441,6 @@ void PPC64TargetInfo::relocateOne(uint8_
 
   uint8_t *L = Buf + Rel.r_offset;
   uint64_t S = SymVA;
-  int64_t A = Rel.r_addend;
   uint64_t P = BaseAddr + Rel.r_offset;
   uint64_t TB = getPPC64TocBase();
 
@@ -453,16 +452,16 @@ void PPC64TargetInfo::relocateOne(uint8_
   // For a TOC-relative relocation, adjust the addend and proceed in terms of
   // the corresponding ADDR16 relocation type.
   switch (Type) {
-  case R_PPC64_TOC16:       Type = R_PPC64_ADDR16;       A -= TB; break;
-  case R_PPC64_TOC16_DS:    Type = R_PPC64_ADDR16_DS;    A -= TB; break;
-  case R_PPC64_TOC16_LO:    Type = R_PPC64_ADDR16_LO;    A -= TB; break;
-  case R_PPC64_TOC16_LO_DS: Type = R_PPC64_ADDR16_LO_DS; A -= TB; break;
-  case R_PPC64_TOC16_HI:    Type = R_PPC64_ADDR16_HI;    A -= TB; break;
-  case R_PPC64_TOC16_HA:    Type = R_PPC64_ADDR16_HA;    A -= TB; break;
+  case R_PPC64_TOC16:       Type = R_PPC64_ADDR16;       S -= TB; break;
+  case R_PPC64_TOC16_DS:    Type = R_PPC64_ADDR16_DS;    S -= TB; break;
+  case R_PPC64_TOC16_LO:    Type = R_PPC64_ADDR16_LO;    S -= TB; break;
+  case R_PPC64_TOC16_LO_DS: Type = R_PPC64_ADDR16_LO_DS; S -= TB; break;
+  case R_PPC64_TOC16_HI:    Type = R_PPC64_ADDR16_HI;    S -= TB; break;
+  case R_PPC64_TOC16_HA:    Type = R_PPC64_ADDR16_HA;    S -= TB; break;
   default: break;
   }
 
-  uint64_t R = S + A;
+  uint64_t R = S;
 
   switch (Type) {
   case R_PPC64_ADDR16:
@@ -616,36 +615,35 @@ void AArch64TargetInfo::relocateOne(uint
 
   uint8_t *L = Buf + Rel.r_offset;
   uint64_t S = SymVA;
-  int64_t A = Rel.r_addend;
   uint64_t P = BaseAddr + Rel.r_offset;
   switch (Type) {
   case R_AARCH64_ABS16:
-    if (!isInt<16>(S + A))
+    if (!isInt<16>(S))
       error("Relocation R_AARCH64_ABS16 out of range");
-    write16le(L, S + A);
+    write16le(L, S);
     break;
   case R_AARCH64_ABS32:
-    if (!isInt<32>(S + A))
+    if (!isInt<32>(S))
       error("Relocation R_AARCH64_ABS32 out of range");
-    write32le(L, S + A);
+    write32le(L, S);
     break;
   case R_AARCH64_ABS64:
     // No overflow check needed.
-    write64le(L, S + A);
+    write64le(L, S);
     break;
   case R_AARCH64_ADD_ABS_LO12_NC:
     // No overflow check needed.
-    or32le(L, ((S + A) & 0xFFF) << 10);
+    or32le(L, (S & 0xFFF) << 10);
     break;
   case R_AARCH64_ADR_PREL_LO21: {
-    uint64_t X = S + A - P;
+    uint64_t X = S - P;
     if (!isInt<21>(X))
       error("Relocation R_AARCH64_ADR_PREL_LO21 out of range");
     updateAArch64Adr(L, X & 0x1FFFFF);
     break;
   }
   case R_AARCH64_ADR_PREL_PG_HI21: {
-    uint64_t X = getAArch64Page(S + A) - getAArch64Page(P);
+    uint64_t X = getAArch64Page(S) - getAArch64Page(P);
     if (!isInt<33>(X))
       error("Relocation R_AARCH64_ADR_PREL_PG_HI21 out of range");
     updateAArch64Adr(L, (X >> 12) & 0x1FFFFF); // X[32:12]




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