[PATCH] D13708: AArch64: Disable the latency heuristic

[Matthias Braun via llvm-commits]

MatzeB created this revision.
MatzeB added reviewers: jmolloy, rengolin, aadg.
MatzeB added a subscriber: llvm-commits.
MatzeB set the repository for this revision to rL LLVM.
Herald added subscribers: rengolin, aemerson.

This patch disable the machine scheduler heuristic that attempts to balance scheduling between multiple long latency chains. In our benchmarks this heuristic tended to increase register pressure and lead to spilling occasionally but didn't appear to have any positive effects on any benchmarks (it seems long latency chains are scarce in practice and out of order cores tend to handle them well).

The main question to review here is if I should guard the changes to AArch64SubTarget.cpp with an "if (isCyclone())" or if the changes are fine on other aarch64 cores as well.

Repository:
  rL LLVM

http://reviews.llvm.org/D13708

Files:
  include/llvm/CodeGen/MachineScheduler.h
  lib/CodeGen/MachineScheduler.cpp
  lib/Target/AArch64/AArch64Subtarget.cpp

Index: lib/CodeGen/MachineScheduler.cpp
===================================================================
--- lib/CodeGen/MachineScheduler.cpp
+++ lib/CodeGen/MachineScheduler.cpp
@@ -2722,8 +2722,8 @@
 
   // Avoid serializing long latency dependence chains.
   // For acyclic path limited loops, latency was already checked above.
-  if (Cand.Policy.ReduceLatency && !Rem.IsAcyclicLatencyLimited
-      && tryLatency(TryCand, Cand, Zone)) {
+  if (!RegionPolicy.DisableLatencyHeuristic && Cand.Policy.ReduceLatency &&
+      !Rem.IsAcyclicLatencyLimited && tryLatency(TryCand, Cand, Zone)) {
     return;
   }
 
Index: include/llvm/CodeGen/MachineScheduler.h
===================================================================
--- include/llvm/CodeGen/MachineScheduler.h
+++ include/llvm/CodeGen/MachineScheduler.h
@@ -156,8 +156,12 @@
   bool OnlyTopDown;
   bool OnlyBottomUp;
 
+  // Disable heuristic that tries to fetch nodes from long dependency chains
+  // first.
+  bool DisableLatencyHeuristic;
+
   MachineSchedPolicy(): ShouldTrackPressure(false), OnlyTopDown(false),
-    OnlyBottomUp(false) {}
+    OnlyBottomUp(false), DisableLatencyHeuristic(false) {}
 };
 
 /// MachineSchedStrategy - Interface to the scheduling algorithm used by
Index: lib/Target/AArch64/AArch64Subtarget.cpp
===================================================================
--- lib/Target/AArch64/AArch64Subtarget.cpp
+++ lib/Target/AArch64/AArch64Subtarget.cpp
@@ -114,6 +114,7 @@
   // bi-directional scheduling. 253.perlbmk.
   Policy.OnlyTopDown = false;
   Policy.OnlyBottomUp = false;
+  Policy.DisableLatencyHeuristic = true;
 }
 
 bool AArch64Subtarget::enableEarlyIfConversion() const {


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