[PATCH] D13648: AVX512: shuff62x2 DAG lowering

[Simon Pilgrim via llvm-commits]

RKSimon added inline comments.

================
Comment at: lib/Target/X86/Utils/X86ShuffleDecode.h:91
@@ -88,1 +90,3 @@
+void DecodeVSHUF128Mask(MVT VT, unsigned Imm,
+                          SmallVectorImpl<int> &ShuffleMask);
 
----------------
What I meant was the Decode functions in this file tend to be named after the x86 instruction itself and not the shuffle / ISD type. AFAICT all of these use the VSHUFF64x2 / VSHUFI64x2 instruction - that's why I suggested calling it DecodeVSHUF64x2Mask.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:10727
@@ +10726,3 @@
+  assert(VT.getSizeInBits() == 512 &&
+         "Unexpected vector size for 128bit shuffle.");
+
----------------
OK.


Repository:
  rL LLVM

http://reviews.llvm.org/D13648