[PATCH] D13466: [AArch64] Implement vector splitting on UADDV.

[Jun Bum Lim via llvm-commits]

junbuml added a comment.

Looks like PR25093 is another case for ADDV match. 
For the test case for  <16 x i32> here, I think we could also use below simple test case  :

  define i32 @test(<16 x i32>* %arr)  {
    %bin.rdx = load <16 x i32>, <16 x i32>* %arr
  
    %rdx.shuf0 = shufflevector <16 x i32> %bin.rdx, <16 x i32> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
    %bin.rdx0 = add <16 x i32> %bin.rdx, %rdx.shuf0
  
    %rdx.shuf = shufflevector <16 x i32> %bin.rdx0, <16 x i32> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef >
    %bin.rdx11 = add <16 x i32> %bin.rdx0, %rdx.shuf
  
    %rdx.shuf12 = shufflevector <16 x i32> %bin.rdx11, <16 x i32> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef>
    %bin.rdx13 = add <16 x i32> %bin.rdx11, %rdx.shuf12
  
    %rdx.shuf13 = shufflevector <16 x i32> %bin.rdx13, <16 x i32> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef>
    %bin.rdx14 = add <16 x i32> %bin.rdx13, %rdx.shuf13
  
    %r = extractelement <16 x i32> %bin.rdx14, i32 0
    ret i32 %r
  }


http://reviews.llvm.org/D13466