[PATCH] D13508: [ARM] Only lower to interleaved load/store if the target has NEON

[silviu.baranga@arm.com via llvm-commits]

sbaranga added a comment.

Thanks, Jeroen! This makes sense to me. I think we also need a test for the interleaved store lowering (I see that there is only a test for loads).

Also, would we need a similar change for AArch64?

Thanks,
Silviu


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Comment at: test/CodeGen/ARM/arm-interleaved-accesses-bug.ll:1
@@ +1,2 @@
+; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 -mattr=-neon < %s | FileCheck %s
+
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Is -mcpu=cortex-a9 required here?


http://reviews.llvm.org/D13508