[llvm] r249500 - AMDGPU: Add comment for VOP2b operand class

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Tue Oct  6 20:36:00 2015
New Revision: 249500

URL: http://llvm.org/viewvc/llvm-project?rev=249500&view=rev
Log:
AMDGPU: Add comment for VOP2b operand class

Because of the constant bus requirement, it is never legal to
use a literal constant for these instructions despite the encoding
allowing it. This was already doing the right thing, but note why.

Modified:
    llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td

Modified: llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td?rev=249500&r1=249499&r2=249500&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td Tue Oct  6 20:36:00 2015
@@ -1187,6 +1187,11 @@ def VOP2b_I32_I1_I32_I32 : VOPProfile<[i
 // Write out to vcc or arbitrary SGPR and read in from vcc or
 // arbitrary SGPR.
 def VOP2b_I32_I1_I32_I32_I1 : VOPProfile<[i32, i32, i32, i1]> {
+  // We use VCSrc_32 to exclude literal constants, even though the
+  // encoding normally allows them since the implicit VCC use means
+  // using one would always violate the constant bus
+  // restriction. SGPRs are still allowed because it should
+  // technically be possible to use VCC again as src0.
   let Src0RC32 = VCSrc_32;
   let Asm32 = "$dst, vcc, $src0, $src1, vcc";
   let Asm64 = "$dst, $sdst, $src0, $src1, $src2";