[lld] r249246 - [ELF/AArch64] Support R_AARCH64_ADR_PREL_PG_H121 relocation.

[Davide Italiano via llvm-commits]

Author: davide
Date: Sat Oct  3 14:56:07 2015
New Revision: 249246

URL: http://llvm.org/viewvc/llvm-project?rev=249246&view=rev
Log:
[ELF/AArch64] Support R_AARCH64_ADR_PREL_PG_H121 relocation.

Modified:
    lld/trunk/ELF/Target.cpp
    lld/trunk/test/elf2/aarch64-relocs.s

Modified: lld/trunk/ELF/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.cpp?rev=249246&r1=249245&r2=249246&view=diff
==============================================================================
--- lld/trunk/ELF/Target.cpp (original)
+++ lld/trunk/ELF/Target.cpp Sat Oct  3 14:56:07 2015
@@ -267,6 +267,12 @@ static uint64_t AArch64GetPage(uint64_t
   return Expr & (~static_cast<uint64_t>(0xFFF));
 }
 
+static void handle_ADD_ABS_LO12_NC(uint8_t *Location, uint64_t S, int64_t A) {
+  // No overflow check.
+  uint64_t X = ((S + A) & 0xFFF) << 10;
+  write32le(Location, read32le(Location) | X);
+}
+
 static void handle_ADR_PREL_LO21(uint8_t *Location, uint64_t S, int64_t A,
                                  uint64_t P) {
   uint64_t X = S + A - P;
@@ -294,6 +300,9 @@ void AArch64TargetInfo::relocateOne(uint
   int64_t A = Rel.r_addend;
   uint64_t P = BaseAddr + Rel.r_offset;
   switch (Type) {
+  case R_AARCH64_ADD_ABS_LO12_NC:
+    handle_ADD_ABS_LO12_NC(Location, S, A);
+    break;
   case R_AARCH64_ADR_PREL_LO21:
     handle_ADR_PREL_LO21(Location, S, A, P);
     break;

Modified: lld/trunk/test/elf2/aarch64-relocs.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf2/aarch64-relocs.s?rev=249246&r1=249245&r2=249246&view=diff
==============================================================================
--- lld/trunk/test/elf2/aarch64-relocs.s (original)
+++ lld/trunk/test/elf2/aarch64-relocs.s Sat Oct  3 14:56:07 2015
@@ -30,3 +30,17 @@ mystr:
 # CHECK: Disassembly of section .R_AARCH64_ADR_PREL_PG_H121:
 # CHECK-NEXT: $x.2:
 # CHECK-NEXT:   11012:       01 00 00 90     adrp    x1, #0
+
+.section .R_AARCH64_ADD_ABS_LO12_NC,"ax", at progbits
+  add x0, x0, :lo12:.L.str
+.L.str:
+  .asciz "blah"
+  .size mystr, 4
+
+# S = 0x1101b, A = 0x4
+# R = (S + A) & 0xFFF = 0x1f
+# R << 10 = 0x7c00
+#
+# CHECK: Disassembly of section .R_AARCH64_ADD_ABS_LO12_NC:
+# CHECK-NEXT: $x.4:
+# CHECK-NEXT:   1101b:       00 7c 00 91     add     x0, x0, #31