[llvm] r248152 - [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def

James Molloy via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 21 07:34:38 PDT 2015


Hi Artyom,

Could you point me to the code review here? I can see a review thread but
nowhere there does anyone approve the patch. In fact Peter raises concerns
that seemingly aren't addressed.

Cheers,

James
On Mon, 21 Sep 2015 at 05:44, Artyom Skrobov via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: askrobov
> Date: Mon Sep 21 07:43:10 2015
> New Revision: 248152
>
> URL: http://llvm.org/viewvc/llvm-project?rev=248152&view=rev
> Log:
> [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def
>
> Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in
> a
> hand-rolled tricky condition block in tools/clang/lib/Basic/Targets.cpp,
> with
> a FIXME: attached.
>
> This patch changes the handling of +t2dsp to be in line with other
> architecture extensions.
>
> Following review comments, also updating the description of
> FeatureDSPThumb2
> in ARM.td.
>
> Differential Revision: http://reviews.llvm.org/D12937
>
>
> Modified:
>     llvm/trunk/include/llvm/Support/ARMTargetParser.def
>     llvm/trunk/include/llvm/Support/TargetParser.h
>     llvm/trunk/lib/Support/TargetParser.cpp
>     llvm/trunk/lib/Target/ARM/ARM.td
>
> Modified: llvm/trunk/include/llvm/Support/ARMTargetParser.def
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ARMTargetParser.def?rev=248152&r1=248151&r2=248152&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/Support/ARMTargetParser.def (original)
> +++ llvm/trunk/include/llvm/Support/ARMTargetParser.def Mon Sep 21
> 07:43:10 2015
> @@ -61,35 +61,35 @@ ARM_ARCH("armv4t", AK_ARMV4T, "4T", "v4t
>  ARM_ARCH("armv5t", AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T,
>            AEK_NONE)
>  ARM_ARCH("armv5te", AK_ARMV5TE, "5TE", "v5e",
> ARMBuildAttrs::CPUArch::v5TE,
> -          AEK_NONE)
> +          AEK_T2DSP)
>  ARM_ARCH("armv5tej", AK_ARMV5TEJ, "5TEJ", "v5e",
> ARMBuildAttrs::CPUArch::v5TEJ,
> -          AEK_NONE)
> +          AEK_T2DSP)
>  ARM_ARCH("armv6", AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6,
> -          AEK_NONE)
> +          AEK_T2DSP)
>  ARM_ARCH("armv6k", AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K,
> -          AEK_NONE)
> +          AEK_T2DSP)
>  ARM_ARCH("armv6t2", AK_ARMV6T2, "6T2", "v6t2",
> ARMBuildAttrs::CPUArch::v6T2,
> -          AEK_NONE)
> +          AEK_T2DSP)
>  ARM_ARCH("armv6z", AK_ARMV6Z, "6Z", "v6z", ARMBuildAttrs::CPUArch::v6KZ,
> -          AEK_SEC)
> +          AEK_T2DSP)
>  ARM_ARCH("armv6zk", AK_ARMV6ZK, "6ZK", "v6zk",
> ARMBuildAttrs::CPUArch::v6KZ,
> -          AEK_SEC)
> +          AEK_T2DSP)
>  ARM_ARCH("armv6-m", AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M,
>            AEK_NONE)
>  ARM_ARCH("armv6s-m", AK_ARMV6SM, "6S-M", "v6sm",
> ARMBuildAttrs::CPUArch::v6S_M,
>            AEK_NONE)
>  ARM_ARCH("armv7-a", AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7,
> -          AEK_NONE)
> +          AEK_T2DSP)
>  ARM_ARCH("armv7-r", AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7,
> -          AEK_HWDIV)
> +          (AEK_HWDIV | AEK_T2DSP))
>  ARM_ARCH("armv7-m", AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7,
>            AEK_HWDIV)
>  ARM_ARCH("armv7e-m", AK_ARMV7EM, "7E-M", "v7em",
> ARMBuildAttrs::CPUArch::v7E_M,
> -          AEK_HWDIV)
> +          (AEK_HWDIV | AEK_T2DSP))
>  ARM_ARCH("armv8-a", AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8,
> -         (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | AEK_HWDIV))
> +         (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | AEK_HWDIV |
> AEK_T2DSP))
>  ARM_ARCH("armv8.1-a", AK_ARMV8_1A, "8.1-A", "v8.1a",
> ARMBuildAttrs::CPUArch::v8,
> -         (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | AEK_HWDIV))
> +         (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | AEK_HWDIV |
> AEK_T2DSP))
>  // Non-standard Arch names.
>  ARM_ARCH("iwmmxt", AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE,
>            AEK_NONE)
> @@ -100,21 +100,21 @@ ARM_ARCH("xscale", AK_XSCALE, "xscale",
>  ARM_ARCH("armv5", AK_ARMV5, "5T", "v5", ARMBuildAttrs::CPUArch::v5T,
>            AEK_NONE)
>  ARM_ARCH("armv5e", AK_ARMV5E, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE,
> -          AEK_NONE)
> +          AEK_T2DSP)
>  ARM_ARCH("armv6j", AK_ARMV6J, "6J", "v6", ARMBuildAttrs::CPUArch::v6,
> -          AEK_NONE)
> +          AEK_T2DSP)
>  ARM_ARCH("armv6hl", AK_ARMV6HL, "6-M", "v6hl",
> ARMBuildAttrs::CPUArch::v6_M,
>            AEK_NONE)
>  ARM_ARCH("armv7", AK_ARMV7, "7", "v7", ARMBuildAttrs::CPUArch::v7,
>            AEK_NONE)
>  ARM_ARCH("armv7l", AK_ARMV7L, "7-L", "v7l", ARMBuildAttrs::CPUArch::v7,
> -          AEK_NONE)
> +          AEK_T2DSP)
>  ARM_ARCH("armv7hl", AK_ARMV7HL, "7-L", "v7hl", ARMBuildAttrs::CPUArch::v7,
> -          AEK_NONE)
> +          AEK_T2DSP)
>  ARM_ARCH("armv7s", AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7,
> -          AEK_NONE)
> +          AEK_T2DSP)
>  ARM_ARCH("armv7k", AK_ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7,
> -          AEK_NONE)
> +          AEK_T2DSP)
>  #undef ARM_ARCH
>
>  #ifndef ARM_ARCH_EXT_NAME
>
> Modified: llvm/trunk/include/llvm/Support/TargetParser.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetParser.h?rev=248152&r1=248151&r2=248152&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/Support/TargetParser.h (original)
> +++ llvm/trunk/include/llvm/Support/TargetParser.h Mon Sep 21 07:43:10 2015
> @@ -81,6 +81,7 @@ enum ArchExtKind : unsigned {
>    AEK_SIMD = 0x80,
>    AEK_SEC = 0x100,
>    AEK_VIRT = 0x200,
> +  AEK_T2DSP = 0x400,
>    // Unsupported extensions.
>    AEK_OS = 0x8000000,
>    AEK_IWMMXT = 0x10000000,
>
> Modified: llvm/trunk/lib/Support/TargetParser.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/TargetParser.cpp?rev=248152&r1=248151&r2=248152&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Support/TargetParser.cpp (original)
> +++ llvm/trunk/lib/Support/TargetParser.cpp Mon Sep 21 07:43:10 2015
> @@ -189,6 +189,9 @@ bool llvm::ARM::getExtensionFeatures(uns
>    else
>      Features.push_back("-crc");
>
> +  if (Extensions & ARM::AEK_T2DSP)
> +    Features.push_back("+t2dsp");
> +
>    return getHWDivFeatures(Extensions, Features);
>  }
>
>
> Modified: llvm/trunk/lib/Target/ARM/ARM.td
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=248152&r1=248151&r2=248152&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARM.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARM.td Mon Sep 21 07:43:10 2015
> @@ -119,9 +119,9 @@ def FeatureAvoidMOVsShOp : SubtargetFeat
>  def FeatureHasRAS : SubtargetFeature<"ras", "HasRAS", "true",
>                                       "Has return address stack">;
>
> -/// Some M architectures don't have the DSP extension (v7E-M vs. v7M)
> +/// Some architectures don't have the DSP extension
>  def FeatureDSPThumb2 : SubtargetFeature<"t2dsp", "Thumb2DSP", "true",
> -                                 "Supports v7 DSP instructions in
> Thumb2">;
> +                              "Supports DSP instructions in ARM and/or
> Thumb2">;
>
>  // Multiprocessing extension.
>  def FeatureMP : SubtargetFeature<"mp", "HasMPExtension", "true",
>
>
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